Low-offset high speed reference buffer

An analog-to-digital (ADC) converter, comprising:

• a capacitive digital-to-analog converter (DAC) configured to receive an input voltage and a digital feedback signal;
• a comparator coupled to the DAC and configured to generate a comparison signal based on a DAC output;
• a successive-approximation register (SAR) coupled to receive the comparison signal and to provide the digital feedback signal to the capacitive DAC;
• and
• a reference buffer configured to receive a reference input voltage and to provide a reference output voltage to the capacitive DAC, the reference buffer comprising:
• an amplifier configured to amplify a difference between the reference output voltage and the reference input voltage during a closed-loop phase of the reference buffer;
• a sample circuit configured to sample an amplifier output voltage during the closed-loop phase;
• a buffer circuit having a buffer input coupled to the sample circuit and a buffer output configured to provide the reference output voltage to an output of the reference buffer;
• a first switch circuit coupled to an output stage of the amplifier and to the sample circuit, the first switch circuit configured to isolate the sample circuit from the output stage of the amplifier during an open-loop phase of the reference buffer;
• and
• a second switch circuit coupled to the output of the reference buffer and to an input stage of the amplifier, the second switch circuit configured to isolate the input stage from the output of the reference buffer during the open-loop phase.

A method for buffering a reference voltage, comprising:

• amplifying a difference between reference input voltage and a reference output voltage of a reference buffer during a closed-loop phase of the reference buffer;
• sampling an output of an amplifier with a sample circuit during the closed-loop phase;
• buffering a sampled voltage to generate the reference output voltage;
• isolating the sample circuit from an output stage of the amplifier during an open-loop phase of the reference buffer;
• and
• isolating an input stage of the amplifier from reference output voltage of the reference buffer during the open-loop phase.