Single and dual-edge triggered phase error detection

A method, comprising:

• generating, via a phase error detector, an error signal proportional to a phase difference between a reference clock and a feedback clock, the feedback clock generated by a clock tracking circuit to track the reference clock;
• generating, via a phase detector with a phase threshold, a status signal that indicates status of a phase relationship between the reference clock and the feedback clock, wherein generating the status signal comprises:
• responsive to an error signal being greater than or equal to the phase threshold of the phase detector, setting the status signal to a first value that indicates that one of the reference clock or the feedback clock respectively operates outside a phase detector's dead-zone;
• and
• responsive to the error signal being less than the phase threshold of the phase detector, setting the status signal to a second value that indicates that one of the reference clock or the feedback clock respectively operates within the phase detector's dead-zone, the second value different than the first value, and
• responsive to the status signal that indicates status of the phase relationship between the reference clock and the feedback clock, setting the phase error detector to be responsive to either:
• edges of the reference clock and the feedback clock having a first polarity;
• or
• edges of the reference clock and the feedback clock having a first polarity and edges of the reference clock and the feedback clock having a second polarity, wherein the second polarity is different than the first polarity.