US 12,587,196 B2Granted

Thin oxide low voltage to high voltage level shifters

AssigneeXilinx, Inc.

InventorsLakshmi Venkata Satya Lalitha Indumathi Janaswamy, Narendra Kumar Pulipati, Shidong Zhou, Anil Kumar Kandala, Santosh Yachareni, Sree Rama Krishna Chaithnya Saraswatula

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Abstract

A level shifter may include a first transistor stack including at least four transistors arranged from a first voltage source to ground, including second and third transistors coupled with bias voltage source, and a fourth transistor coupled with an input to receive an input signal at a second voltage or ground. The level shifter may include a second transistor stack comprising at least four transistors arranged from the first voltage source to ground, including second and third transistors coupled with the bias voltage source, and a fourth transistor to receive an inverse of the input signal. A first transistor of the first transistor stack is cross-coupled with a first transistor of the second transistor stack. A level shifter may include a first output coupled with the second transistor stack between the second and third transistors to provide a first output signal at the first voltage or ground.

Claims15

Dependent claims

A level shifter, comprising:

a first transistor stack comprising at least four transistors arranged from a source of a first voltage to a ground, including a second transistor and a third transistor coupled with a source of a bias voltage, and a fourth transistor coupled with an input of the level shifter, the input to receive an input signal at a second voltage or the ground, the second voltage less than the first voltage;
a second transistor stack comprising at least four transistors arranged from the source of the first voltage to the ground, including a second transistor and a third transistor coupled with the source of the bias voltage, and a fourth transistor coupled with an inverse input associated with the input and to receive an inverse of the input signal, wherein a first transistor of the first transistor stack is cross-coupled with a first transistor of the second transistor stack;
a first output coupled with the second transistor stack between the second transistor and the third transistor to provide a first output signal at the first voltage or the ground;
and
a pullup transistor having a source coupled with the source of the bias voltage, a drain coupled with a first node between the first transistor and the second transistor of the second transistor stack, and a gate coupled with the first output.

2 more elements

A level shifter, comprising:

a first transistor stack comprising a first pullup transistor coupled with a source of a first voltage, a second pullup transistor, a first pulldown transistor, and a second pulldown transistor coupled with a ground;
a second transistor stack comprising a third pullup transistor coupled with the source of the first voltage, a fourth pullup transistor, a third pulldown transistor, and a fourth pulldown transistor coupled with the ground;
and
an inverter having an input coupled with a signal input to the level shifter, and a fifth pullup transistor having a source coupled with a source of a bias voltage, a drain coupled with a first node between the third pullup transistor and the fourth pullup transistor, and a gate coupled with a first output, wherein the source of the first voltage is associated with the first output of the level shifter and is greater than a second voltage associated with the signal input of to the level shifter wherein the first pullup transistor and the third pullup transistor are cross-coupled, wherein each gate of the second pullup transistor, the first pulldown transistor, the third pullup transistor, and the third pulldown transistor are coupled with a source of a bias voltage, a gate of the second pulldown transistor is coupled with an input to receive an input signal for the level shifter, a gate of the fourth pulldown transistor is coupled with an output of the inverter.

1 more element

An apparatus, comprising:

a first set of cross-coupled pullup transistors each having a source that is coupled with a source of a first voltage;
a second set of pullup transistors each having a gate coupled with a source of a bias voltage that is less than the first voltage, and a source that is coupled with a drain of a respective pullup transistor of the first set of cross-coupled pullup transistors;
a first set of pulldown transistors each having a gate coupled with the source of the bias voltage, and a drain that is coupled with a drain of a respective pullup transistor of the second set of pullup transistors;
a second set of pulldown transistors each having a drain that is coupled with a source of a respective pulldown transistor of the first set of pulldown transistors, and a source coupled with a ground, wherein a gate of a first pulldown transistor of the second set of pulldown transistors is configured to receive an input signal at a second voltage or the ground, the second voltage less than the first voltage;
and
a first output at the drain of one of the pullup transistors of the second set of pullup transistors to provide a first output signal at the first voltage or the ground;
and
a first pullup transistor having a source coupled with the source of the bias voltage, a drain coupled with a first node between a pullup transistor of the first set of cross- coupled pullup transistors and a pullup transistor of the second set of pullup transistors, and a gate coupled with the first output.

5 more elements

Dependencies are inferred from the claim text.