US 12,587,146 B2Granted

Power amplifier devices with in-package matching circuits that provide pseudo inverse class F operation

AssigneeNXP USA, Inc.

InventorsLaure Bollinger, Yuanyuan Dong, Aniket Anant Wadodkar, Liang Xu

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Abstract

A power amplifier device includes an amplification path implemented within a power amplifier package. The amplification path includes input and output package leads, a transistor die with transistor input and output terminals and a power transistor, and a two-stage input impedance matching circuit electrically coupled between the input package lead and the transistor input terminal. The two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal. The amplification path also includes an output impedance matching circuit coupled between the transistor output terminal and the first output package lead, and a second output harmonic termination circuit coupled to the first output package lead.

Claims19

Dependent claims

A power amplifier device comprising:

a power amplifier package;
a first amplification path implemented within the power amplifier package, wherein the first amplification path includes
a first input package lead coupled to the power amplifier package and extending between an interior of the power amplifier package and an exterior of the power amplifier package,
a first output package lead coupled to the power amplifier package and extending between the interior of the power amplifier package and the exterior of the power amplifier package,
a first transistor die encased within the power amplifier package and including a transistor input terminal, a transistor output terminal, and a first power transistor with an input terminal coupled to the transistor input terminal, and an output terminal coupled to the transistor output terminal, wherein the first power transistor is a gallium nitride transistor with a periphery in a range of 26-80 millimeters and an output capacitance in a range of 0.1-0.4 picofarads per millimeter (pF/mm),
a two-stage input impedance matching circuit encased within the power amplifier package and electrically coupled between the first input package lead and the transistor input terminal, wherein the two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal,
an output impedance matching circuit encased within the power amplifier package and coupled between the transistor output terminal and the first output package lead, and
a second output harmonic termination circuit encased within the power amplifier package and coupled to the first output package lead.

5 more elements

A power amplifier device comprising:

a power amplifier package;
a first amplification path implemented within the power amplifier package, wherein the first amplification path includes
a first input package lead coupled to the power amplifier package and extending between an interior of the power amplifier package and an exterior of the power amplifier package,
a first output package lead coupled to the power amplifier package and extending between the interior of the power amplifier package and the exterior of the power amplifier package,
a first transistor die encased within the power amplifier package and including a transistor input terminal, a transistor output terminal, and a first power transistor with an input terminal coupled to the transistor input terminal, and an output terminal coupled to the transistor output terminal,
a two-stage input impedance matching circuit encased within the power amplifier package and electrically coupled between the first input package lead and the transistor input terminal, wherein the two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal, wherein the two-stage input impedance matching circuit includes
a first node coupled to the first input package lead,
the first resonator, which includes
a first capacitor coupled between the first node and a ground reference node, and
a first inductive element coupled between the first node and a second node;
and
the second resonator, which includes
a second capacitor coupled between the second node and the ground reference node, and
a second inductive element coupled between the second node and the transistor input terminal,
an output impedance matching circuit encased within the power amplifier package and coupled between the transistor output terminal and the first output package lead, and
a second output harmonic termination circuit encased within the power amplifier package and coupled to the first output package lead;
and
a video bandwidth circuit coupled between the second node and the ground reference node, wherein the video bandwidth circuit includes a plurality of components, and wherein the plurality of components includes an envelope resistor, an envelope inductor, and an envelope capacitor coupled in series between the second node and the ground reference node.

15 more elements

A power amplifier device comprising:

a power amplifier package;
a first amplification path implemented within the power amplifier package, wherein the first amplification path includes
a first input package lead coupled to the power amplifier package and extending between an interior of the power amplifier package and an exterior of the power amplifier package,
a first output package lead coupled to the power amplifier package and extending between the interior of the power amplifier package and the exterior of the power amplifier package,
a first transistor die encased within the power amplifier package and including a transistor input terminal, a transistor output terminal, and a first power transistor with an input terminal coupled to the transistor input terminal, and an output terminal coupled to the transistor output terminal,
a two-stage input impedance matching circuit encased within the power amplifier package and electrically coupled between the first input package lead and the transistor input terminal, wherein the two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal,
an output impedance matching circuit encased within the power amplifier package and coupled between the transistor output terminal and the first output package lead, wherein the output impedance matching circuit comprises:
a first inductive element coupled between the transistor output terminal and the first output package lead,
a second inductive element coupled between the transistor output terminal and a node, and
a DC blocking capacitor coupled between the node and a ground reference node, and
a second output harmonic termination circuit encased within the power amplifier package and coupled to the first output package lead, wherein the second harmonic termination circuit is formed from a third inductive element and a second capacitor coupled in series between the first output package lead and a ground reference node, wherein the second harmonic termination circuit resonates at a second harmonic frequency of a fundamental frequency of operation of the amplifier, and wherein the second harmonic termination circuit is directly connected to the first output package lead.

8 more elements

A power amplifier device forming a portion of a Doherty amplifier, the power amplifier device comprising:

a power amplifier package;
a peaking amplification path implemented within the power amplifier package, wherein the peaking amplification path includes
a first input package lead coupled to the power amplifier package and extending between an interior of the power amplifier package and an exterior of the power amplifier package,
a first output package lead coupled to the power amplifier package and extending between the interior of the power amplifier package and the exterior of the power amplifier package,
a first transistor die encased within the power amplifier package and including a transistor input terminal, a transistor output terminal, and a first power transistor with an input terminal coupled to the transistor input terminal, and an output terminal coupled to the transistor output terminal, wherein the first power transistor is a gallium nitride transistor with a periphery in a range of 26-80 millimeters and an output capacitance in a range of 0.1-0.4 picofarads per millimeter (pF/mm),
a two-stage input impedance matching circuit encased within the power amplifier package and electrically coupled between the first input package lead and the transistor input terminal, wherein the two-stage input impedance matching circuit has a double T-match topology that includes a first resonator coupled to the first input package lead, and a second resonator coupled between the first resonator and the transistor input terminal,
an output impedance matching circuit encased within the power amplifier package and coupled between the transistor output terminal and the first output package lead, and
a second output harmonic termination circuit encased within the power amplifier package and coupled to the first output package lead;
and
a carrier amplification path implemented within the power amplifier package, wherein the carrier amplification path includes
a second input package lead coupled to the power amplifier package and extending between an interior of the power amplifier package and an exterior of the power amplifier package,
a second output package lead coupled to the power amplifier package and extending between the interior of the power amplifier package and the exterior of the power amplifier package,
a second transistor die encased within the power amplifier package and including a second power transistor,
an additional input impedance matching circuit encased within the power amplifier package and electrically coupled between the second input package lead and an input terminal of the second power transistor,
an additional output impedance matching circuit encased within the power amplifier package and coupled between an output terminal of the second power transistor and the second output package lead, and
an additional second output harmonic termination circuit encased within the power amplifier package and coupled to the second output package lead.

13 more elements

Dependencies are inferred from the claim text.

Facts

Application: 18/173,855Filed 24 Feb 2023
Priority: CN 202211452662.318 Nov 2022
Published: US 2024/0171132 A123 May 2024
Granted: 24 Mar 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification17 codes

H03F 1/565
Modifications of input or output impedances, not otherwise provided for: using inductive elements
H03F 1/0288
In transistor amplifiers: using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using…
H03F 3/195
With semiconductor devices only: in integrated circuits
H03F 3/211
With semiconductor devices only: using a combination of several amplifiers