Negative discharge circuit

A method comprising:

• in response to a first voltage being on a discharge enable node, holding a negative voltage on a negative node by a negative discharge circuit, an input node of the negative discharge circuit being electrically connected to the discharge enable node;
• and
• in response to a second voltage being on the discharge enable node, discharging the negative voltage from the negative node to a discharge node by the negative discharge circuit, the negative discharge circuit including a discharge circuit branch and a control circuit branch, wherein:
• the discharge circuit branch includes a first n-type transistor and a second n-type transistor;
• a drain node of the first n-type transistor is electrically coupled to the negative node;
• a source node of the first n-type transistor is electrically coupled to a drain node of the second n-type transistor;
• a source node of the second n-type transistor is electrically coupled to the discharge node;
• the negative voltage is discharged through the first n-type transistor and the second n-type transistor;
• the control circuit branch includes a p-type transistor, a third n-type transistor, a fourth n-type transistor, and a diode;
• a control input node of the control circuit branch has a control input voltage based on a voltage on the discharge enable node;
• a source node of the p-type transistor and a drain node of the fourth n-type transistor are electrically coupled to the control input node;
• a drain node of the p-type transistor is electrically connected to an anode of the diode;
• a cathode of the diode is electrically coupled to a drain node of the third n-type transistor and a gate node of the first n-type transistor;
• a source node of the third n-type transistor is electrically connected to the negative node;
• a source node of the fourth n-type transistor is electrically connected to a gate node of the second n-type transistor;
• and
• the second voltage is different from the first voltage.

A non-transitory storage medium storing an electronic representation of a circuit design, the circuit design including a negative discharge circuit, the negative discharge circuit comprising:

• a control circuit branch electrically coupled between a control input node and a negative node, the control circuit branch including:
• a p-type transistor having a first source node, a first drain node, and a first gate node, the first source node being electrically coupled to the control input node;
• a diode having an anode and a cathode, the anode being electrically coupled to the first drain node of the p-type transistor;
• a first n-type transistor having a second source node, a second drain node, and a second gate node, the second drain node being electrically coupled to the cathode, the second source node being electrically coupled to the negative node;
• and
• a second n-type transistor having a third source node, a third drain node, and a third gate node, the third drain node being electrically connected to the first source node of the p-type transistor;
• and
• a discharge circuit branch electrically coupled between the negative node and a discharge node, the discharge circuit branch including:
• a third n-type transistor having a fourth source node, a fourth drain node, and a fourth gate node, the fourth drain node being electrically coupled to the negative node, the fourth gate node being electrically coupled to the cathode;
• and
• a fourth n-type transistor having a fifth source node, a fifth drain node, and a fifth gate node, the third source node being electrically connected to the fifth gate node, the fifth drain node being electrically coupled to the fourth source node of the third n-type transistor, the fifth source node being electrically coupled to the discharge node.