Substrate parasite reduction technique
AssigneeSemiconductor Components Industries, LLC
InventorSrinivasa Prasad Soundararajan
Life of this patent
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Abstract
A protection circuit is disclosed for use in automotive or industrial high power integrated circuits equipped with reverse battery protection and reverse current protection. The protection circuit prevents formation of parasitic devices that could cause the high power integrated circuit to malfunction or fail to turn on. The protection circuit features asynchronous operation of a pair of MOSFETs coupled between a power supply and a load. The protection circuit can be engaged at start-up or in response to transient conditions associated with a fault.
Claims20
An apparatus, comprising:
- a supply terminal configured to receive a voltage supply for a circuit;
- a load terminal configured to be coupled to a load driven by the circuit;
- and
- a first metal oxide semiconductor field effect transistor (MOSFET) and a second MOSFET coupled in series between the supply terminal and the load terminal, the first MOSFET and the second MOSFET being configured to switch on and off asynchronously, the first MOSFET having a gate controlled by a first clock signal and the second MOSFET having a gate controlled by a second clock signal, the first clock signal having a frequency different from a frequency of the second clock signal.
A method, comprising:
- providing a power integrated circuit (IC) with reverse current protection when a reverse flow of current occurs between a power supply and an output of a protection circuit, the protection circuit including a first metal oxide semiconductor field effect transistor (MOSFET) and a second MOSFET coupled in series between a supply terminal of the power supply and a load terminal of the power IC, the reverse current protection including activating the first MOSFET prior to activating the second MOSFET by coupling to the second MOSFET a second clock signal having a lower frequency than a first clock signal coupled to the first MOSFET;
- and
- preventing formation of a parasitic device between the power supply and an internal ground.
A circuit, comprising:
- a power supply terminal;
- a load terminal;
- and
- a protection device including:
- a first metal oxide semiconductor field effect transistor (MOSFET) and a second MOSFET coupled in series between the power supply terminal and the load terminal;
- a first charge pump coupled to a first gate of the first MOSFET;
- a second charge pump coupled to a second gate of the second MOSFET;
- a first delay device coupled between the first charge pump and the first gate;
- and
- a second delay device coupled between an enable signal and the second charge pump, the protection device configured to provide reverse battery protection and reverse current protection, and to prevent formation of a parasitic path, by asynchronously activating the first MOSFET and the second MOSFET using the first delay device and the second delay device.
Dependencies are inferred from the claim text.