Method for adjusting gate bias clamp voltage, semiconductor device, and bias clamp circuit using the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChien Hung Liu, Hsin Fu Lin, Kuo-Ching Huang
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Abstract
The present disclosure provides a bias clamp circuit, which includes a plurality of switchable clamp voltage paths, configured to selectively clamp a gate bias voltage of a vulnerable circuit to a first voltage or a second voltage based on whether a reliability acceleration test is performed on the vulnerable circuit or not. The second voltage is higher than the first voltage.
Claims20
A semiconductor device, comprising:
- a vulnerable circuit, coupled to a first input/output (I/O) pad of the semiconductor device;
- a voltage clamp, configured to provide a first voltage across a terminal of the vulnerable circuit and a first node;
- a switch, coupled between the first node and a reference node;
- and
- a voltage booster, coupled between the first node and the reference node in parallel to the switch, and configured to provide a boost voltage;
- wherein when a reliability acceleration test is not performed on the semiconductor device, a bias voltage at the terminal of the vulnerable circuit is clamped at substantially the first voltage via the voltage clamp and the switch,
- wherein when the reliability acceleration test is performed on the semiconductor device, the bias voltage at the terminal of the vulnerable circuit is clamped at a second voltage via the voltage clamp and the voltage booster, and the second voltage is substantially equal to the first voltage plus the boost voltage.
A bias clamp circuit, comprising:
- a plurality of switchable clamp voltage paths, configured to selectively clamp a bias voltage of a vulnerable circuit to a first voltage or a second voltage based on whether a reliability acceleration test is performed on the vulnerable circuit or not,
- wherein the second voltage is higher than the first voltage,
- wherein the switchable clamp voltage paths comprise:
- a first path, configured to clamp the bias voltage of the vulnerable circuit to the first voltage when the reliability acceleration test is not performed on the vulnerable circuit;
- and
- a second path, configured to clamp the bias voltage of the vulnerable circuit to the second voltage when the reliability acceleration test is performed on the vulnerable circuit,
- wherein the first path and the second path share a voltage clamp that provides a substantially fixed clamp voltage.
A method for adjusting a gate bias clamp voltage, for use in a semiconductor device comprising a vulnerable circuit, a first clamp voltage path, and a second clamp voltage path, the method comprising:
- determining whether a reliability acceleration test is performed on the semiconductor device;
- in response to a determination that the reliability acceleration test is not performed on the semiconductor device, clamping a bias voltage of the vulnerable circuit at a first voltage using the first clamp voltage path;
- and
- in response to a determination that the reliability acceleration test is performed on the semiconductor device, clamping the bias voltage of the vulnerable circuit at a second voltage using the second clamp voltage path,
- wherein the second voltage is higher than the first voltage,
- wherein the first clamp voltage path and the second clamp voltage path share a voltage clamp that provides a substantially fixed clamp voltage.
Dependencies are inferred from the claim text.