Multilayer ceramic capacitor including internal electrode layers with varying coverages

A multilayer ceramic capacitor comprising:

• a multilayer body including a plurality of laminated dielectric layers, a plurality of internal electrode layers each laminated on a respective one of the plurality of dielectric layers, a first main surface and a second main surface opposed to each other in a lamination direction, a first end surface and a second end surface opposed to each other in a length direction orthogonal or substantially orthogonal to the lamination direction, and a first side surface and a second side surface opposed to each other in a width direction orthogonal or substantially orthogonal to the lamination direction and the length direction;
• and
• three or more external electrodes;
• wherein
• the plurality of internal electrode layers include a plurality of first internal electrode layers and a plurality of second internal electrode layers;
• the plurality of first internal electrode layers each include a first counter electrode portion opposed to a respective one of the plurality of second internal electrode layers with a respective one of the plurality of dielectric layers interposed therebetween, a first extension portion extending from the first counter electrode portion and extending toward and being exposed at a first surface portion of the multilayer body, and a second extension portion extending from the first counter electrode portion and extending toward and being exposed at a second surface portion of the multilayer body;
• the plurality of second internal electrode layers each include a second counter electrode portion opposed to a respective one of the plurality of first internal electrode layers with a respective one of the plurality of dielectric layers interposed therebetween, and a third extension portion extending from the second counter electrode portion and extending toward and being exposed at a third surface portion of the multilayer body;
• the three or more external electrodes include a first external electrode connected to the first extension portion, a second external electrode connected to the second extension portion, and a third external electrode connected to the third extension portion;
• the first counter electrode portion includes a first central region including a central portion of the first counter electrode portion, and a first peripheral region around the first central region;
• the first peripheral region includes a first connection region connected to the first extension portion, a second connection region connected to the second extension portion, and a portion other than the first connection region and the second connection region;
• a coverage of each of the first connection region and the second connection region with respect to the dielectric layers is higher than a coverage of the first central region with respect to the dielectric layers and higher than a coverage of the portion other than the first connection region and the second connection region of the first peripheral region with respect to the dielectric layers;
• coverages of the first extension portion and the second extension portion with respect to the dielectric layers are higher than the coverage of the first central region with respect to the dielectric layers;
• and
• in at least one of the plurality of first internal electrode layers, an average thickness of the first counter electrode portion is equal or substantially equal to an average thickness of at least one of the first and second connection regions.