Memory system, operating method of the memory system, and interface circuit of the memory system
AssigneeSamsung Electronics Co., Ltd.
InventorsAnil Kavala, Youngmin Jo, Jungjune Park, Chiweon Yoon
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AssigneeSamsung Electronics Co., Ltd.
InventorsAnil Kavala, Youngmin Jo, Jungjune Park, Chiweon Yoon
Estimating the term…
A memory system includes a memory device having a plurality of non-volatile memories, a buffer chip connected with each of the plurality of non-volatile memories, and a memory controller connected with the buffer chip and configured to provide a data strobe signal and a data signal to the buffer chip. The buffer chip includes a first loop coupled to a sampler circuit and configured to perform first monitoring on the data strobe signal and first duty correction on the data strobe signal based on the first monitoring, and a second loop coupled to a multiplexer and configured to, responsive to the first duty correction, perform second monitoring on the data strobe signal and second duty correction on the data strobe signal based on the second monitoring. The buffer chip is configured to store first and second duty correction information for at least one of the plurality of non-volatile memories.
A memory system comprising:
An operating method of a memory system including a buffer chip connected with each of a plurality of non-volatile memories of a memory device, and a memory controller connected with the buffer chip and configured to provide a data strobe signal and a data signal thereto, the operating method comprising:
An interface circuit of a memory system, the interface circuit configured to connect a memory device including a plurality of non-volatile memories with a memory controller configured to provide a data strobe signal and a data signal to the memory device, the interface circuit comprising:
Dependencies are inferred from the claim text.