Memory device including read offset compensator and offset reference resistance compensation method thereof

A read offset compensator of a memory device, the read offset compensator comprising:

• an error detector configured to determine whether a number of error bits of output data input from a plurality of sense amplifiers of the memory device is greater than a threshold value and output a compensation enable signal based on a result of the determination;
• an offset reference resistance generator configured to generate an offset reference resistance;
• and
• a plurality of sense amplifier offset compensators corresponding respectively to the plurality of sense amplifiers, each of the plurality of sense amplifier offset compensators configured to receive output data from a corresponding one of the plurality of sense amplifiers, compare the output data with expected data, and adjust the offset reference resistance for the sense amplifier based on a result of the comparison;
• wherein each of the plurality of sense amplifier offset compensators calculates a local resistance for compensating the offset reference resistance for a corresponding one of the plurality of sense amplifiers during an offset reference resistance compensation operation, and, during a read operation, adjusts a reference resistance for the corresponding one of the plurality of sense amplifiers based on the local resistance for the corresponding one of the plurality of sense amplifiers.

A method for compensating offset reference resistance of a memory device, the method comprising:

• writing a plurality of memory cells of the memory device with the same data;
• reading output data of a plurality of sense amplifiers;
• determining whether a number of error bits of the output data from the plurality of sense amplifiers is greater than a threshold value, and outputting a compensation enable signal based on a result of the determining;
• and
• calculating a local resistance for each of the plurality of sense amplifiers based on the compensation enable signal, and compensating for an offset reference resistance of each of the plurality of sense amplifiers using the local resistance corresponding to the sense amplifier,
• wherein, during a read operation, the memory device adjusts a reference resistance for each of the plurality of sense amplifiers based on the local resistance corresponding to the sense amplifier.