US 12,586,632 B2 · Signal receiver, data receiver and data latch thereof

Abstract

A signal receiver includes a data receiver and a data strobe signal receiver. The data receiver includes a plurality of current mode logic circuits and a plurality of data latches. A first stage current mode logic circuit receives a data signal, and a final stage current mode logic circuit outputs an amplified data signal. The plurality of data latches receive the amplified data signal, wherein each of the data latches sums the amplified data signal and a plurality of feedback data to obtain a summing data, and latches the summing data to output an output data according to one of a plurality of amplified data strobe signals. The data strobe signal receiver receives a data strobe signal, and generates the plurality of amplified data strobe signals by dividing a frequency of the data strobe signal.

Claims20

Dependent claims

A signal receiver, comprising:

a data receiver, comprising:
a plurality of current mode logic circuits, coupled in series, wherein a first stage current mode logic circuit receives a data signal, and a final stage current mode logic circuit outputs an amplified data signal;
and
a plurality of data latches, coupled to the final stage current mode logic circuit to receive the amplified data signal, wherein each of the data latches sums the amplified data signal and a plurality of feedback data to obtain a summing data, and latches the summing data to output an output data according to one of a plurality of frequency-divided data strobe signals;
and
a data strobe signal receiver, receiving a data strobe signal, and generating the plurality of frequency-divided data strobe signals by dividing a frequency of the data strobe signal.

3 more elements

A data latch, applied to a data receiver, wherein the data latch comprises:

a first latch circuit;
a differential pair, having a first differential end and a second differential end respectively coupled to two ends of the first latch circuit, wherein the differential pair receives a first signal and a second signal, and the first signal and the second signal are a differential signal pair;
a current source, coupled to a common end of the differential pair, drawing a common current from the common end according to a first bias voltage;
a plurality of first DFE summers, coupled to the first differential end, drawing a first bias current from the first differential end according to the plurality of feedback data;
a plurality of second DFE summers, coupled to the second differential end, drawing a second bias current from the second differential end according to the plurality of feedback data;
and
a second latch circuit, coupled to the first latch circuit, and obtaining the corresponding output data according to the output from the first latch circuit.

4 more elements

Dependencies are inferred from the claim text.

Signal receiver, data receiver and data latch thereof

Life of this patent

Signal receiver, data receiver and data latch thereof

Life of this patent

Abstract

Claims20