Back to results
US 12,586,613 B2Granted
Memory device including a filtering circuit and memory system including the memory device and filtering circuit
AssigneeSK hynix Inc.
InventorsJong Soon Won, Hae Rang Choi
Life of this patent
Estimating the term…
Abstract
A memory device includes a plurality of memory circuits, and a filtering circuit. The filtering circuit is configured to perform a filtering operation on data and to transmit filtered data to the plurality of memory circuits or to outside of the memory device.
Claims18
A memory device comprising:
- a plurality of memory circuits;
- a filtering circuit configured to perform a filtering operation on data and to transmit filtered data to the plurality of memory circuits or to outside of the memory device;
- and
- an input and output (input/output) pad performing a data input/output operation with the outside of the memory device,
- wherein the filtering circuit is configured to directly receive write data from the outside of the memory device through the input/output pad to perform a data filtering operation and to transmit filtered write data to the plurality of memory circuits.
2 more elements
A memory device comprising:
- a plurality of memory circuits;
- a plurality of filtering circuits disposed to respectively correspond to the plurality of memory circuits;
- and
- an input and output (input/output) pad performing a data input/output operation with the outside of the memory device,
- wherein each of the plurality of filtering circuits is configured to perform a filtering operation on data and to transmit filtered data to corresponding memory circuit among the plurality of memory circuits or to the outside of the memory device, and configured to directly receive write data from the outside of the memory device through the input/output pad to perform a data filtering operation and to transmit filtered write data to the plurality of memory circuits.
2 more elements
A memory system comprising:
- a host device;
- a memory device configured to perform a read operation, a write operation, and an arithmetic operation according to a request from the host device;
- and
- an external storage device providing data to the memory device or receiving data from the memory device,
- wherein the memory device includes:
- a plurality of memory circuits;
- a plurality of filtering circuits configured to receive data from the external storage device or the plurality of memory circuits and to transmit filtered data to the plurality of memory circuits or the host device;
- and
- an input and output (input/output) pad performing a data input/output operation with the host device and the external storage device,
- wherein each of the filtering circuits is configured to receive write data from an external storage device through the input/output pad to perform a data filtering operation, and to write filtered write data in the plurality of memory circuits through the global input/output line.
7 more elements
A memory system comprising:
- a host device;
- a memory device configured to perform a read operation, a write operation, and an arithmetic operation according to a request from the host device;
- and
- an external storage device providing data to the memory device or receiving data from the memory device,
- wherein the memory device includes:
- a plurality of memory circuits;
- a plurality of filtering circuits disposed to respectively correspond to the plurality of memory circuits;
- and
- an input and output (input/output) pad performing a data input/output operation with the host device and the external storage device, and
- wherein each of the plurality of filtering circuits is configured to perform a data filtering operation on data and to transmit filtered data to a corresponding memory circuit among the plurality of memory circuits or an external device, and configured to receive write data from an external storage device through the input/output pad to perform a data filtering operation, and to write filtered write data in the plurality of memory circuits through the global input/output line.
7 more elements
Dependencies are inferred from the claim text.