Systems and methods for configuring a display device and display system

A display system comprising:

• a pixel array of pixels, each pixel having at least one illuminating element in an illumination die, each illumination element of a pixel being electrically coupled to pixel circuitry in a tile-able backplane die of a tile, the tile-able backplane die comprising:
• pixel drive and logic circuitry on a first area of the backplane die comprising:
• a receiving pixel memory device;
• an active pixel memory device electrically coupled to the receiving pixel memory device;
• logic function circuitry coupled to the active pixel memory device;
• a latch coupled to the logic function circuitry;
• and
• a current drive device coupled to the latch, wherein the current drive device drives operation of each pixel of the pixel array;
• and
• tile controller circuitry on a second area of the backplane die comprising circuitry configured to:
• receive a serial data stream;
• extract image data or video data from the serial data stream according to when an address of the tile is in the data stream;
• decode the image or video data after it has been extracted from the data stream;
• control writing of the image or video data to the receiving pixel memory device;
• and
• write the image data or video data that has been extracted and subsequently decoded to a data bus corresponding to or associated with a column that includes or contains one or more pixels of the pixel array, the column being identified as a destination for writing the image data or video data;
• wherein the illumination die is coupled to a front surface of the tile-able backplane die such that the first area is aligned with at least one illuminating element in the illumination die,
• wherein the tile-able backplane die comprises a plurality of openings in a back surface of the tile-able backplane die, the plurality of openings configured to receive the serial data stream from a tile array controller.

A method, comprising:

• transmitting serial data from a master controller to one or more tiles in a plurality of tiles via a printed circuit board, the data having a header including a tile address, the tile address being associated with a first tile of the plurality of tiles;
• receiving the serial data at a tile controller of the first tile, the tile controller comprising a backplane, the backplane comprising:
• a first area comprising a plurality of first strip areas;
• a second area comprising a plurality of second strip areas alternating with the plurality of first strip areas;
• pixel logic circuitry at least one of arranged on, embedded in, integrated into, formed on, deposited onto or coupled to the first area, the pixel logic circuitry being coupled to one or more illumination elements in an illumination die coupled to a front surface of the backplane;
• and
• input/output logic circuitry at least one of arranged on, embedded in, integrated into, formed on, deposited onto or coupled to the second area, the input/output logic circuitry being coupled to the printed circuit board through a plurality of openings in a back surface of the backplane aligned with the second area;
• and
• at the tile controller of the first tile:
• recognizing the tile address in the header of the serial data;
• identifying tile data as a subset of the serial data received from the master controller;
• and
• storing the tile data at a memory component in, or associated with, the first tile.