Processing device and method for secure booting thereof
AssigneeRebellions Inc.
InventorMyunghoon Choi
Life of this patent
Estimating the term…
Abstract
Provided are a processing device and a method for secure booting thereof, in which the processing device includes a security core that operates a Root of Trust and sequentially performs an integrity check on first firmware and second firmware through the Root of Trust, a main core that sequentially operates the first firmware and the second firmware, a non-volatile memory storing the first firmware and the second firmware, and a first volatile memory that loads the first firmware and the second firmware from a main core domain of the main core and operates the loaded firmware with the main core.
Claims20
A processing device comprising:
- a security core that operates a Root of Trust and sequentially performs, through the Root of Trust, a first integrity check on first firmware and a second integrity check on second firmware;
- a main core that sequentially performs a first operation of the first firmware and a second operation of the second firmware;
- a non-volatile memory that stores the first firmware and the second firmware;
- a first volatile memory that loads the first firmware and the second firmware from a main core domain of the main core and operates the loaded firmware with the main core,
- wherein the first integrity check is performed before the first operation,
- wherein the second integrity check is performed before the second operation, and
- wherein the first operation is performed in parallel with the second integrity check.
A method for secure booting of a processing device, the method comprising:
- operating, by a security core, a Root of Trust;
- performing, by the security core, a first integrity check on first firmware and a second integrity check on second firmware sequentially;
- and
- performing, by a main core, a first operation of the first firmware on which the first integrity check is performed, and a second operation of the second firmware on which the second integrity check is performed,
- wherein the first operation is performed in parallel with the second integrity check.
Dependencies are inferred from the claim text.