Back to results
US 12,585,763 B2Granted
Detecting and responding to environmental condition-induced security attacks on semiconductor packages
AssigneeHewlett Packard Enterprise Development LP
InventorsTheodore F. Emerson, Christopher M. Wesneski, Daniel J. Zink
Life of this patent
Estimating the term…
Abstract
A process incudes generating, by a canary circuit of a semiconductor package, an output value. The semiconductor package includes a hardware root-of-trust engine for an electronic system. The process includes comparing, by the canary circuit, the output value to an expected value. The process incudes, responsive to a result of the comparison, regulating, by the semiconductor package, a response of the electronic system to a reset request.
Claims23
A method comprising:
- generating, by a canary circuit of a semiconductor package, an output value, wherein the semiconductor package comprises a hardware root-of-trust engine for an electronic system;
- comparing, by the canary circuit, the output value to an expected value;
- receiving, by the electronic system, a reset request directed to placing a component of the electronic system in a reset state;
- and
- responsive to a result of the comparison, regulating, by the semiconductor package, a response of the electronic system to the reset request.
2 more elements
A baseboard management controller comprising:
- a management processor;
- and
- a secure enclave separate from the management processor, wherein the secure enclave has an associated cryptographic boundary and comprises:
- a security processing core;
- a root-of-trust engine to validate machine-readable instructions to be executed by the security processing core, wherein the root-of-trust engine comprises a first plurality of logic gates;
- a canary circuit comprising a second plurality of logic gates spatially commingled with the first plurality of logic gates, wherein the canary circuit to detect tampering with the secure enclave, wherein detection of the tampering comprises generating, by the canary circuit, an output value and comparing, by the canary circuit, the output value to an expected value to provide a tampering indication;
- and
- a controller to perform a responsive action in response to the tampering indication.
5 more elements
A computer platform comprising:
- a main processing core;
- and
- a security processor comprising:
- a security processing core;
- a root-of-trust engine, wherein the root-of-trust engine comprises a first plurality of logic gates to validate a first firmware instruction portion to be executed by the security processing core, the first firmware instruction portion is part of a chain of trust, and the chain of trust includes a second firmware instruction portion to be executed by the main processing core;
- and
- a canary circuit comprising a second plurality of logic gates to generate an output value and compare the output value to an expected value to provide a tampering indication, wherein logic gates of the second plurality of logic gates are spatially commingled with logic gates of the first plurality of logic gates;
- and
- a reset governor to regulate a reset hold time of the security processor responsive to the tampering indication.
6 more elements
Dependencies are inferred from the claim text.