Memory device with embedded deep learning accelerator in multi-client environment

An apparatus comprising:

• at least one processing device configured to accelerate computations for a neural network;
• at least one memory configured to store data for the processing device and a host device;
• a memory interface to the host device;
• and
• a controller configured to:
• manage time slots during which access to the memory by at least one of the host device or the processing device is permitted;
• communicate, by the memory interface using a memory bus protocol, with the host device regarding access to the memory;
• and
• monitor memory transactions by the processing device and the host device;
• and
• based on monitoring the memory transactions, provide access to a first portion of the memory by the host device during a first time slot, and access to a second portion of the memory by the processing device during at least a portion of the first time slot.

A method comprising:

• providing time slots for read and write access to memory;
• signaling a processing device regarding availability of a time slot to access memory;
• synchronizing a timing of the time slots with a timing of the signaling;
• receiving, using a memory bus protocol, data from a host device;
• storing the received data during a first time slot of the time slots;
• performing, using the stored data, computations for an artificial intelligence (AI) model to provide at least one result;
• storing the result in the memory during a second time slot of the time slots;
• and
• sending, using the memory bus protocol, the result to the host device.