Tag size reduction using multiple hash functions
AssigneeIntel Corporation
InventorsKermin Chofleming, Yu Bai
Life of this patent
Estimating the term…
Abstract
An example of a system using two-stage, the cache tag is stored in a primary and a secondary tag memories. When requesting data, the system searches the cache to retrieve the data, an operation that involves cache tag lookup. Cache tag lookup is performed by cache management. The cache management receives a cache tag for reading data from the cache memory. The cache management selects a hash function from a group of hash functions and computes a primary lookup tag using the selected hash function and the cache tag. The cache management compares the primary lookup tag to the contents of the primary tag memory to determine if there is a hit. If there is no hit, the cache management selects another hash function and repeats the search in the primary tag memory.
Claims18
An apparatus for cache management, comprising:
- a primary tag memory to store primary tags computed from first portions of cache tags, where a cache tag has a first portion and a second portion with more bits than the first portion, the cache tag to identify data in a cache memory separate from the primary tag memory;
- a secondary tag memory separate from the primary tag memory and the cache memory, to store the second portions of the cache tags as secondary tags;
- and
- circuitry coupled to the primary tag memory to:
- receive a selected cache tag for data to be read from the cache memory,
- compute a primary lookup tag from the first portion of the selected cache tag,
- compare the primary lookup tag to contents of the primary tag memory, and
- if there is a hit on the primary tag memory, compare the second portion of the selected cache tag to contents of the secondary tag memory to determine if there is a cache hit.
A compute system, comprising:
- a processor;
- a memory;
- a cache memory;
- and
- an apparatus for cache management comprising:
- a primary tag memory to store primary tags computed from first portions of cache tags, where a cache tag has a first portion and a second portion with more bits than the first portion, the cache tag to identify data in a cache memory separate from the primary tag memory;
- a secondary tag memory separate from the primary tag memory and the cache memory, to store the second portions of the cache tags as secondary tags;
- and
- circuitry coupled to the primary tag memory to:
- receive a selected cache tag for data to be read from the cache memory,
- compute a primary lookup tag from the first portion of the selected cache tag,
- compare the primary lookup tag to contents of the primary tag memory, and
- if there is a hit on the primary tag memory, compare the second portion of the selected cache tag to contents of the secondary tag memory to determine if there is a cache hit.
A method for cache management, comprising:
- storing primary tags computed from first portions of cache tags in a primary tag memory, where a cache tag has a first portion and a second portion with more bits than the first portion, the cache tag to identify data in a cache memory;
- storing the second portions of the cache tags as secondary tags in a secondary tag memory;
- receiving a selected cache tag for data to be read from the cache memory;
- computing a primary lookup tag from the first portion of the selected cache tag;
- comparing the primary lookup tag to contents of the primary tag memory;
- and
- if there is a hit on the primary tag memory, comparing the second portion of the selected cache tag to contents of the secondary tag memory to determine if there is a cache hit.
Dependencies are inferred from the claim text.