Systems and methods for verifying data in memory
AssigneeSamsung Electronics Co., Ltd.
InventorsChanghee Jung, Yang Seok Ki
Life of this patent
Estimating the term…
Abstract
A system, including: a code cache; and a memory controller connected to the code cache, and configured to: receive a read command to read requested data from a location in primary memory connected to the memory controller over a first interface; read first data stored in the location from the primary memory; read a code corresponding to the requested data associated with the read command from the code cache, or from secondary memory connected to the memory controller over a second interface different from the first interface; perform error detection and/or correction based on the first data and the code; select second data based on a result of the error detection and/or correction; and output the second data for the requested data.
Claims20
A system, comprising:
- a code cache;
- and
- a memory controller connected to the code cache, and configured to:
- receive a read command to read requested data from a location in primary memory connected to the memory controller over a first interface;
- read first data stored in the location from the primary memory;
- read a code corresponding to the requested data associated with the read command from secondary memory connected to the memory controller over a second interface different from the first interface;
- store the code in the code cache;
- perform error detection and/or correction based on the first data and the code;
- select second data based on a result of the error detection and/or correction;
- and
- output the second data for the requested data.
A system comprising:
- a code cache;
- and
- a memory controller connected to the code cache, and configured to:
- receive a request to write data to a primary memory connected to the memory controller over a first interface, wherein the request comprises the data;
- generate, based on the data, a code corresponding to the data;
- store the data in the primary memory;
- store the code in secondary memory connected to the memory controller over a second interface;
- and
- store the code in the code cache such that the code is stored in both the secondary memory and the code cache.
A system, comprising:
- a code cache;
- and
- a memory controller connected to the code cache, wherein the memory controller comprises:
- an error detection (ED) code generator configured to generate codes based on data associated with requests to write the data received by the memory controller;
- and
- error checking logic configured to detect, based on the codes generated by the code generator and stored in the code cache, errors in data read from primary memory by the memory controller during read instructions,
- wherein the memory controller is configured to store the codes in the code cache and in a secondary memory different from the primary memory such that the codes are stored in both the code cache and the secondary memory.
Dependencies are inferred from the claim text.