Boot process with core isolation
AssigneeInternational Business Machines Corporation
InventorsLuke Hopkins, Michael James Becht, Ying-Yeung Li, Clinton E. Bubb
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Abstract
The embodiments herein describe techniques for implementing enhanced boot processing of an embedded compute complex including a plurality of cores. Disclosed embodiments enable isolating the plurality of cores of the embedded compute complex from other components of a computing system when the cores are released from reset at the beginning of the boot initialization sequence, and enable a hierarchical boot process for booting the plurality of cores of the embedded compute complex.
Claims20
A method comprising:
- setting an acquire fence, by one or more processors of a system interconnect controlling a boot process, at a start of the boot process of an embedded compute complex, where the acquire fence is set to prevent a plurality of cores in the embedded compute complex from fetching code instructions;
- providing a boot message register associated with the plurality of cores;
- writing, after a start of the boot process, boot addresses to the boot message register using a maintenance core of the plurality of cores;
- monitoring, by the plurality of cores except of the maintenance core, the boot message register associated with the plurality of cores during the boot process;
- releasing, by the one or more processors, the acquire fence in response to enabling access to system memory during the boot process;
- and
- accessing the boot address written in the boot message register by one core of the plurality of cores to boot the one core to the boot address and start code execution with the one core.
A system, comprising one or more computer processors;
- and a memory containing a program which when executed by the one or more computer processors performs an operation, the operation comprising:
- setting an acquire fence, by one or more processors of a system interconnect controlling a boot process, at a start of the boot process of an embedded compute complex, where the acquire fence is set to prevent a plurality of cores in the embedded compute complex from fetching code instructions;
- providing a boot message register associated with the plurality of cores;
- writing, after a start of the boot process, boot addresses to the boot message register using a maintenance core of the plurality of cores;
- monitoring, by the plurality of cores except of the maintenance core, the boot message register associated with the plurality of cores during the boot process;
- releasing, by the one or more processors, the acquire fence in response to enabling access to system memory during the boot process;
- and
- accessing the boot address written in the boot message register by one core of the plurality of cores to boot the one core to the boot address and start code execution with the one core.
A computer program product comprising a computer-readable storage medium having computer-readable program code embodied therewith, the computer-readable program code executable by one or more computer processors to perform an operation comprising:
- setting an acquire fence, by one or more processors of a system interconnect controlling a boot process, at a start of the boot process of an embedded compute complex, where the acquire fence is set to prevent a plurality of cores in the embedded compute complex from fetching code instructions;
- providing a boot message register associated with the plurality of cores;
- writing, after a start of the boot process, boot addresses to the boot message register using a maintenance core of the plurality of cores;
- monitoring, by the plurality of cores except of the maintenance core, the boot message register associated with the plurality of cores during the boot process;
- releasing, by the one or more processors, the acquire fence in response to enabling access to system memory during the boot process;
- and
- accessing the boot address written in the boot message register by one core of the plurality of cores to boot the one core to the boot address and start code execution with the one core.
Dependencies are inferred from the claim text.