Semiconductor package and method of manufacturing the same

A semiconductor package, comprising:

• a first semiconductor chip including first pads;
• a second semiconductor chip including a substrate including a front surface and a rear surface opposing each other, second pads on the front surface and in contact with the first pads, and a through-electrode electrically connected to the second pads and including a protruding portion protruding from the rear surface of the substrate;
• a first dielectric layer including a first portion surrounding a side surface of the protruding portion of the through-electrode and a second portion extending from one end of the first portion along the rear surface of the substrate;
• and
• a second dielectric layer covering the first portion and the second portion of the first dielectric layer.

A semiconductor package, comprising:

• a first semiconductor chip including first pads;
• a second semiconductor chip below the first semiconductor chip, the second semiconductor chip including a substrate having a front surface and a rear surface opposing each other, second pads on the front surface and electrically connected to the first pads, and through-electrodes electrically connected to the second pads and including protruding portions protruding from the rear surface through the substrate;
• a first dielectric layer on a lower surface of the first semiconductor chip, a side surface and a lower surface of the second semiconductor chip, and side surfaces of the protruding portions of the through-electrodes;
• a second dielectric layer below at least a portion of each of the first semiconductor chip and the second semiconductor chip and below the first dielectric layer, the second dielectric layer including a material different from a material of the first dielectric layer;
• and
• bump structures below the second dielectric layer and electrically connected to the through-electrodes.