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US 12,581,686 B2Granted
Metal oxide semiconductor devices and integration methods
AssigneeGlobalFoundries U.S. Inc.
InventorShesh Mani Pandey
Life of this patent
Estimating the term…
Abstract
A semiconductor device comprises a semiconductor layer over an insulator layer and a base layer under the insulator layer. A well is in the base layer, a doped region is above and coupled with the well, and the doped region is in the insulator layer. A drift region is above and coupled with the doped region, and the drift region is at least partially in the semiconductor layer. A gate stack is partially over the semiconductor layer and partially over drift region.
Claims19
A semiconductor device comprising:
- a semiconductor layer over an insulator layer and a base layer under the insulator layer;
- a well in the base layer;
- a doped region above and directly contacts the well, wherein the doped region is in the insulator layer;
- a drift region above and coupled with the doped region, wherein the drift region is at least partially in the semiconductor layer;
- and
- a gate stack partially over the semiconductor layer and partially over drift region.
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A semiconductor device comprising:
- a semiconductor layer over an insulator layer and a base layer under the insulator layer, wherein the insulator layer has a bottom surface;
- a well in the base layer, wherein the well has a top surface including a first portion contacting the bottom surface of the insulator layer and a second portion adjacent to the first portion;
- a doped region above and coupled with the well, wherein the doped region is in the insulator layer and the doped region has a bottom surface contacting the second portion of the top surface of the well;
- a drift region above and coupled with the doped region, wherein the drift region is at least partially in the semiconductor layer;
- and
- a gate stack having a first portion over the semiconductor layer and a second portion over the drift region, wherein the second portion is adjacent to the first portion.
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A method of fabricating a semiconductor device, the method comprising:
- forming an opening in a substrate, the substrate comprising a semiconductor layer over an insulator layer and a base layer under the insulator layer, wherein the opening terminates at the base layer;
- forming a well in a base layer under the opening;
- forming a doped region over and directly contacting the well and within the opening, wherein the doped region is in the insulator layer;
- forming a drift region over the doped region, wherein the drift region is at least partially in the semiconductor layer;
- and
- forming a gate stack partially over the semiconductor layer and partially over the drift region.
3 more elements
Dependencies are inferred from the claim text.