Accelerator generating enable signal

An apparatus comprising:

• a homomorphic encryption computing device comprising:
• an accelerator configured to receive first input encryption data including homomorphic ciphertext expressed as a polynomial and comprising:
• a first stage circuit to a K-th stage circuit configured to perform an NTT (Number Theoretic Transform) operation on the first input encryption data, wherein the first stage circuit to the K-th stage circuit are connected in series;
• and
• a first assist circuit configured to generate a first enable signal to a K-th enable signal based on a degree of the polynomial of the first input encryption data, wherein the first enable signal to the K-th enable signal enable the first stage circuit to the K-th stage circuit, respectively;
• wherein each of the first stage circuit to the K-th stage circuit comprises:
• a butterfly operator configured to perform a butterfly operation on the first input encryption data or corresponding output encryption data of a previous stage circuit when the corresponding enable signal among the first enable signal to the K-th enable signal indicates a first logical value;
• and
• a bypass circuit configured to bypass the first input encryption data or the corresponding output encryption data of the previous stage circuit when the corresponding enable signal among the first enable signal to K-th enable signal indicates a second logical value;
• a processor configured to control operation of the homomorphic encryption computing device to perform operations on the first input encryption data;
• wherein the degree of the polynomial of the first input encryption data is a natural number less than or equal to 2K;
• and
• wherein K is a natural number.