CMOS-to-CML converter, semiconductor device including the same, and electronic device
AssigneeSamsung Electronics Co., Ltd.
InventorsYongwoo Kim, Kyeongjoon Ko, Hurham Lee
Life of this patent
Estimating the term…
Abstract
A complementary metal oxide semiconductor (CMOS)-to-current mode logic (CML) converter for converting a CMOS input signal into a CML output signal, including: a low-pass filter comprising a fixed resistor and a first fixed capacitor, and a swing width control circuit configured to adjust a swing width of a voltage swing of the CML output signal based on a common mode level, wherein the swing width control circuit includes: a second fixed capacitor; and a variable capacitor comprising a capacitor array.
Claims20
A complementary metal oxide semiconductor (CMOS)-to-current mode logic (CML) converter for converting a CMOS input signal into a CML output signal, the CMOS-to-CML converter comprising:
- a low-pass filter comprising a fixed resistor and a first fixed capacitor;
- and
- a swing width control circuit configured to adjust a swing width of a voltage swing of the CML output signal based on a common mode level,
- wherein the swing width control circuit comprises:
- a second fixed capacitor;
- and
- a variable capacitor comprising a capacitor array.
A semiconductor device comprising:
- a complementary metal oxide semiconductor (CMOS)-to-current mode logic (CML) converter for converting a CMOS input signal into a CML output signal,
- wherein the CMOS-to-CML converter comprises:
- a low-pass filter configured to generate an internal signal by attenuating components of the CMOS input signal;
- and
- a swing width control circuit configured to generate the CML output signal by adjusting a swing width of a voltage swing of the internal signal, and
- wherein the swing width control circuit comprises:
- a fixed capacitor;
- and
- a variable capacitor comprising a capacitor array.
An electronic device comprising:
- a complementary metal oxide semiconductor (CMOS) signal domain circuit configured to operate based on a CMOS signal;
- and
- a semiconductor device comprising:
- a current mode logic (CML) signal domain circuit configured to operate using a CML signal, and
- a CMOS-to-CML converter configured to convert a CMOS input signal into a CML output signal,
- wherein the CMOS-to-CML converter comprises:
- a low-pass filter comprising a fixed resistor and a first fixed capacitor;
- and
- a swing width control circuit, and
- wherein the swing width control circuit comprises:
- a second fixed capacitor, and
- a variable capacitor comprising a capacitor array.
Dependencies are inferred from the claim text.