Apparatus and method of damage mitigation and step coverage enhancement

A method for fabricating a semiconductor device, comprising:

• forming, within a process chamber, a first layer on a surface of a substrate that comprises a plurality of features formed therein, wherein forming the first layer comprises:
• biasing a target at a first target bias power;
• biasing an inductive coil at a first RF bias power while the target is biased to the first target bias power, wherein the inductive coil is disposed between the target and a substrate support that is configured to support the substrate;
• applying a first voltage bias to a collimator disposed between the target and the inductive coil;
• and
• adjusting a pressure within a processing region of the process chamber to a first process pressure;
• forming, within the process chamber, a second layer on the surface of the substrate, wherein forming the second layer comprises:
• biasing the target at a second target bias power, wherein the second target bias power is greater than the first target bias power;
• biasing the inductive coil at a second RF bias power, wherein the second RF bias power is less than the first RF bias power;
• applying a second voltage bias to the collimator, wherein the first voltage bias is less than the second voltage bias;
• and
• adjusting the pressure within the processing region of the process chamber to a second process pressure, wherein the second process pressure is less than the first process pressure;
• and
• exposing, within the process chamber, at least a portion of the second layer to a plasma containing an inert gas, wherein exposing the at least a portion of the second layer comprises:
• biasing the inductive coil at a third RF bias power, wherein the third RF bias power is greater than the second RF bias power;
• and
• adjusting the pressure within the processing region of the process chamber to a third process pressure, wherein the third process pressure is less than the first process pressure.