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US 12,580,016 B2Granted
Memory device
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Tsmc Nanjing Company, Limited
InventorsZhou Yang, Ying-Jhih Shih, Chien-Yu Huang, Jun-Cheng Liu, Ching-Wei Wu
Life of this patent
Estimating the term…
Abstract
A memory device is provided, including at least one inverter, a transistor coupled between the at least one inverter and a bit line, and an assist circuit coupled to the bit line, configured to provide a negative voltage to the bit line, and configured to pull down a power supply voltage provided to the at least one inverter.
Claims20
A memory device, comprising:
- at least one inverter;
- a transistor coupled between the at least one inverter and a bit line;
- and
- an assist circuit coupled to the bit line by a control transistor, the assist circuit configured to provide a negative voltage to the bit line through the control transistor, and configured to pull down a power supply voltage provided to the at least one inverter.
1 more element
A memory device, comprising:
- a pull up transistor configured to receive a power supply voltage;
- a pull down transistor coupled to the pull up transistor at a node;
- a pass gate transistor coupled between the node and a bit line;
- and
- an assist circuit coupled to the bit line by a control transistor, the assist circuit comprising:
- at least one first trace coupled to the bit line through the control transistor;
- at least one second trace configured to couple a negative voltage to the at least one first trace;
- and
- at least one third trace configured to adjust the power supply voltage in response to the negative voltage provided by the at least one second trace.
6 more elements
A memory device, comprising:
- a first inverter;
- a second inverter coupled to the first inverter at a node coupled to a bit line;
- and
- a pull down circuit configured to pull down a first voltage of the node through a control transistor coupled to the bit line and configured to pull down a power supply voltage provided to the first inverter and the second inverter.
1 more element
Dependencies are inferred from the claim text.