Systems and methods for dual standby modes in memory
AssigneeEverspin Technologies, Inc.
InventorSyed M. Alam
Life of this patent
Estimating the term…
Abstract
1. The present disclosure is drawn to, among other things, a method for accessing memory using dual standby modes, the method including receiving a first standby mode indication selecting a first standby mode from a first standby mode or a second standby mode, configuring a read bias system to provide a read bias voltage and a write bias system to provide approximately no voltage, or any voltage outside the necessary range for write operation, based on the first standby mode, receiving a second standby mode indication selecting the second standby mode, and configuring the read bias system to provide at least the read bias voltage and the write bias system to provide a write bias voltage based on the second standby mode, the read bias voltage being lower than the write bias voltage.
Claims20
A method for configuring memory, the method comprising:
- configuring a bias system to provide a first bias voltage corresponding to a first standby mode;
- receiving a standby mode indication selecting a second standby mode;
- upon receiving the standby mode indication, configuring the bias system to provide a second bias voltage corresponding to the second standby mode, wherein the second bias voltage is different from the first bias voltage, and wherein the first and second bias voltages are provided based on receiving a read command and a write command.
A system for configuring memory, the system comprising:
- a memory;
- a bias system;
- and
- a controller, wherein the controller is configured to:
- configure the bias system to provide a first bias voltage corresponding to a first standby mode;
- receive a standby mode indication selecting a second standby mode;
- upon receiving the standby mode indication, configure the bias system to provide a second bias voltage corresponding to the second standby mode, wherein the second bias voltage is different from the first bias voltage, and wherein the first and second bias voltages are provided based on receiving a read command and a write command.
A non-transitory computer-readable medium storing instructions that, when executed by a processor, cause the processor to perform operations, the operations comprising:
- configuring a bias system to provide a first bias voltage corresponding to a first standby mode;
- receiving a standby mode indication selecting a second standby mode;
- and
- upon receiving the standby mode indication, configuring the bias system to provide a second bias voltage corresponding to the second standby mode, wherein the second bias voltage is different from the first bias voltage, and wherein the first and second bias voltages are provided based on receiving a read command and a write command.
Dependencies are inferred from the claim text.