Input circuitry for analog neural memory in a deep learning artificial neural network

An input block for providing an input to a vector-by-matrix multiplication array in a neural memory system, the vector-by-matrix multiplication array comprising non-volatile memory cells arranged in rows and columns, the input block comprising:

• a global digital-to-analog converter;
• a plurality of row registers, each row register corresponding to a row in the array and storing digital input data for the row;
• and
• a plurality of row sample-and-hold buffers, each row sample-and-hold buffer corresponding to a row in the array;
• wherein when the digital input data for a row matches a clock count resulting from counting a clock signal during an interval, the global digital-to-analog converter converts the digital input data into an analog value that is sampled and held by the row sample-and-hold buffer corresponding to the selected row and applied to a line coupled to the selected row.