In-system testing for autonomous systems and applications

A computing system comprising:

• a first chiplet including a first subset of system elements;
• a second chiplet including a second subset of system elements;
• and
• a central controller to cause a first test and a second test to be performed with respect to the computing system, the first test being performed while the first chiplet is enabled and the second chiplet is disabled, and the second test being performed while the first chiplet is disabled and the second chiplet is enabled, the first test and the second test using a same test image that includes one or more first expected behaviors corresponding directly to the first chiplet but not the second chiplet and one or more second expected behaviors corresponding directly to the second chiplet but not the first chiplet.

A processor comprising:

• one or more processing units to perform a system test, at least, by:
• sending a test image to a first chiplet to generate first test results corresponding to a first test associated with the first chiplet, the first chiplet including a first subset of one or more system elements of a computing system;
• and
• generating an automatic response associated with a second chiplet that is disabled during the first test to emulate a response from the second chiplet during the first test, the second chiplet including a second subset of one or more system elements of the computing system.