Memory device, memory system, memory controller, and operation method

A memory system, comprising:

• one or more memory devices comprising:
• a memory cell array comprising a plurality of blocks, wherein the plurality of blocks comprise a plurality of word lines, and a plurality of memory cells coupled to the plurality of word lines, the plurality of memory cells coupled to a same word line form a physical page, and the physical page comprises one or more code words;
• and
• a peripheral circuit coupled to the memory cell array and configured to:
• acquire a predicted initial read voltage of the one or more code words according to a position of the word line coupled to the one or more code words in an open block and a position of a first blank physical page in the open block;
• and
• obtain a target valley voltage of the one or more code words according to a first result corresponding to the one or more code words at the predicted initial read voltage,
• wherein the first result comprises a number of bits representing flipping of the one or more code words in two read results at a first read voltage and a second read voltage, and a difference between the first read voltage and the second read voltage is less than a preset voltage;
• and
• wherein the target valley voltage is used as a read voltage when a read operation is performed on the one or more code words;
• and
• a memory controller coupled with the memory devices and configured to control the memory devices.

A memory controller, comprising:

• a control section configured to:
• acquire a predicted initial read voltage of one or more code words according to a position of a word line coupled to the one or more code words in an open block and a position of a first blank physical page in the open block, the one or more code words being included a memory device coupled to the memory controller, the memory device comprising a plurality of blocks, the plurality of blocks comprising a plurality of word lines and a plurality of memory cells coupled to the plurality of word lines, the plurality of memory cells coupled to a same word line form a physical page, and the physical page comprising the one or more code words;
• and
• obtain a target valley voltage of the one or more code words according to a first result corresponding to the one or more code words at the predicted initial read voltage,
• wherein the first result comprises a number of bits representing flipping of the one or more code words in two read results at a first read voltage and a second read voltage, and a difference between the first read voltage and the second read voltage is less than a preset voltage;
• and
• wherein the target valley voltage is used as a read voltage when a read operation is performed on the one or more code words.