US 12,575,423 B2Granted

Wiring board and semiconductor package

AssigneeSamsung Electronics Co., Ltd.

InventorsSangwook Park, Sangnam Jeong

Life of this patent

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Abstract

A semiconductor package includes a wiring board including at least one pair of connection structures electrically connecting at least one pair of differential signal transmission lines and at least one pair of differential signal transmission terminals, respectively. The at least one pair of connection structures includes first via structures staggered in a vertical direction, at least one first connection line electrically connecting the first via structures, second via structures staggered in the vertical direction, and at least one second connection line electrically connecting the second via structures. The at least one first connection line is spaced apart from the at least one second connection line in the vertical direction and electrically insulated therefrom, and intersects the at least one second connection line in the vertical direction.

Claims20

Dependent claims

A semiconductor package comprising:

a wiring board having an upper surface and a lower surface opposing each other, at least a first pair of differential signal transmission lines disposed on the upper surface, at least a first pair of differential signal transmission terminals disposed below the lower surface, and at least a first pair of connection structures electrically connecting each line of the first pair of differential signal transmission lines to each terminal of the first pair of differential signal transmission terminals, respectively;
a semiconductor chip disposed on the upper surface of the wiring board;
and
external connection bumps disposed below the lower surface of the wiring board to correspond to the first pair of differential signal transmission terminals, respectively,
wherein the first pair of connection structures includes first via structures disposed to be staggered along a vertical direction with respect to the lower surface, at least one first connection line electrically connecting the first via structures, second via structures staggered along the vertical direction, and at least one second connection line electrically connecting the second via structures, and
the at least one first connection line is spaced apart from the at least one second connection line in the vertical direction and is electrically insulated therefrom, and crosses the at least one second connection line when viewed from the vertical direction.

3 more elements

A semiconductor package comprising:

a wiring board having an upper surface and a lower surface opposing each other, the wiring board including at least a first pair of signal transmission lines disposed on the upper surface, at least a first pair of signal transmission terminals disposed below the lower surface, and a first pair of connection structures electrically connecting the first pair of signal transmission lines to the first pair of signal transmission terminals;
a semiconductor chip disposed on the upper surface of the wiring board;
and
external connection bumps disposed below the lower surface of the wiring board to correspond to the first pair of signal transmission terminals, respectively,
wherein the first pair of connection structures includes a first connection structure connecting one signal transmission line of the first pair of signal transmission lines to one signal transmission terminal of the first pair of signal transmission terminals and including first via structures alternately disposed and electrically connected to each other on a first axis and a second axis extending in a vertical direction with respect to the lower surface and spaced apart from each other in a horizontal direction with respect to the lower surface, and disposed between the first pair of signal transmission terminals when viewed from the vertical direction, and a second connection structure connecting the other signal transmission line of the first pair of signal transmission lines to the other signal transmission terminal of the first pair of signal transmission terminals and including second via structures alternately disposed and electrically connected to each other on a third axis and a fourth axis extending in the vertical direction and spaced apart from each other in the horizontal direction, and disposed between the first pair of signal transmission terminals without overlapping either signal transmission terminal of the first pair of signal transmission terminals when viewed from the vertical direction.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 17/858,441Filed 6 Jul 2022
Priority: KR 10-2021-014265225 Oct 2021
Published: US 2023/0127676 A127 Apr 2023
Granted: 10 Mar 2026
Term ends: Not estimatedThe source records don’t support an estimate.

Classification19 codes

H10W 44/20
Electrical arrangements for controlling or matching impedance: at high-frequency [HF] or radio frequency [RF]
H10W 70/65
Characterised by their interconnections: shapes or dispositions of interconnections
H10W 70/685
Shapes or dispositions thereof: comprising multiple insulating layers
H10W 90/00
Package configurations