Silicon-controlled rectifiers with a segmented floating region

A method of forming a structure for a silicon-controlled rectifier, the method comprising:

• forming a first well and a second well in a semiconductor substrate, wherein the first well and the second well have a first conductivity type;
• forming a third well in the semiconductor substrate, wherein the third well has a second conductivity type opposite to the first conductivity type, and the third well is positioned between the first well and the second well;
• forming a first shallow trench isolation region in the third well in the semiconductor substrate;
• forming a second shallow trench isolation region in the semiconductor substrate;
• forming a first terminal including a first doped region in the first well, wherein the first doped region has the second conductivity type;
• forming a second terminal including a second doped region in the second well, wherein the second doped region has the first conductivity type;
• and
• forming a third doped region in the third well, wherein the third doped region includes a first segment and a second segment, and the first segment is separated from the second segment by a portion of the first well and a first portion of the third well, the first segment and the second segment of the third doped region are positioned between the first shallow trench isolation region and the second shallow trench isolation region, the first well adjoins the third well at a p-n junction that is positioned between the first shallow trench isolation region and the second shallow trench isolation region, and the first segment and the second segment each include a portion that extends from the first shallow trench isolation region to the p-n junction.