Integrated circuit and method of forming the same

A system for manufacturing an integrated circuit, the system comprising:

• a non-transitory computer readable medium configured to store non-transitory instructions;
• and
• a processor coupled to the non-transitory computer readable medium, wherein the processor is configured to execute the non-transitory instructions comprising:
• generating a first standard cell layout design of the integrated circuit, the generating the first standard cell layout design includes:
• generating a first set of pin layout patterns extending in a first direction, being on a first layout level, and having a first width in a second direction different from the first direction, and the first standard cell layout design having a first height in the second direction;
• and
• generating a second standard cell layout design of the integrated circuit, the generating the second standard cell layout design includes:
• generating a second set of pin layout patterns extending in the first direction, being on the first layout level, and having a second width in the second direction different from the first width, and the second standard cell layout design having a second height in the second direction different from the first height, and the second standard cell layout design being adjacent to the first standard cell layout design.

A method of forming an integrated circuit, the method comprising:

• placing, by a processor, a first standard cell layout design of the integrated circuit on a layout design, the first standard cell layout design having a first height, the placing the first standard cell layout design includes:
• placing a first set of pin layout patterns on a first layout level and over a first set of gridlines, the first set of pin layout patterns extending in a first direction, and having a first width in a second direction different from the first direction, each gridline of the first set of gridlines is separated from an adjacent gridline of the first set of gridlines in the second direction by a first pitch of the first set of pin layout patterns;
• generating a second standard cell layout design of the integrated circuit, the generating the second standard cell layout design includes:
• generating a second set of pin layout patterns extending in the first direction, being on the first layout level, and over a second set of gridlines, and having a second width in the second direction different from the first width, and the second standard cell layout design having a second height different from the first height, the first height and the second height being in the second direction, and the second standard cell layout design being adjacent to the first standard cell layout design;
• and
• manufacturing the integrated circuit based on at least the first standard cell layout design or the second standard cell layout design.