Semiconductor device and method of fabricating a semiconductor device

A method for forming a vertical power FET for switching a load current, a first lateral FET and a second lateral FET in a common semiconductor substrate, the method comprising:

• providing a semiconductor substrate of a first conductivity type, the semiconductor substrate comprising:
• a first surface, a plurality of trenches for a vertical power FET in the first surface, each comprising a field plate that is electrically insulted from the semiconductor substrate,
• a first predefined region for a first lateral FET comprising a channel region of the first conductivity type, and
• a second predefined region for a second lateral FET comprising a channel region of a second conductivity type opposing the first conductivity type;
• forming a well of the second conductive type in the first surface of the semiconductor substrate in the first predefined region;
• forming a first gate trench in the first surface of the semiconductor substrate for a first gate electrode in the first predefined region and forming a second gate trench in the first surface of the semiconductor substrate for a second gate electrode in the second predefined region;
• forming a gate insulating layer that covers the side walls and base of the first and second gate trenches, the first surface of the semiconductor substrate and the upper portion of the plurality of trenches;
• inserting conductive material into the first and second gate trenches and in the plurality of trenches to form a third gate electrode in the plurality of trenches;
• removing conductive material from the first and second gate trenches in regions adjacent the side walls and peripheral regions of the base and exposing the gate insulating layer on the side walls and the peripheral regions of the base and forming a first gate electrode having a pre-determined length from the conductive material in the first gate trench and a second gate electrode having a pre-determined length from the conductive material in the second gate trench;
• in the second predefined area, implanting dopants of the second conductivity type into the side walls and the peripheral regions of the base of the second gate trench;
• in the first predefined area, implanting dopants of the first conductivity type into the side walls and peripheral regions of the base of the first gate trench;
• and
• forming insulating material in the first and second gate trenches and on the third gate electrodes in the plurality of trenches.