Reducing fin wriggling in fin-thinning process
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTsu-Hui Su, Ssu-Yu Liao, Chun-Hsiang Fan, Kuo-Bin Huang
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Abstract
A method includes depositing a silicon layer over a semiconductor region, forming dielectric isolation regions extending into the silicon layer and the semiconductor region, and recessing the dielectric isolation regions. A first portion of the silicon layer and a second portion of the semiconductor region are between the dielectric isolation regions, and protrude higher than top surfaces of the dielectric isolation regions to form a semiconductor fin. The semiconductor fin is thinned, and after the first semiconductor fin is thinned, the first portion of the silicon layer remains. A gate stack is formed on the semiconductor fin.
Claims20
A method comprising:
- depositing a first silicon layer over a first semiconductor region;
- forming dielectric isolation regions extending into the first silicon layer and the first semiconductor region;
- recessing the dielectric isolation regions, wherein a first portion of the first silicon layer and a second portion of the first semiconductor region are between the dielectric isolation regions, and protrude higher than top surfaces of the dielectric isolation regions to form a first semiconductor fin, and wherein an interface between the first silicon layer and the first semiconductor region is higher than the top surfaces of the dielectric isolation regions;
- thinning the first semiconductor fin, wherein after the first semiconductor fin is thinned, the first portion of the first silicon layer remains;
- and
- forming a gate stack on the first semiconductor fin.
A method comprising:
- forming a semiconductor strip between opposing trenches, wherein the semiconductor strip comprises:
- a first semiconductor layer;
- and
- a second semiconductor layer over the first semiconductor layer, wherein the first semiconductor layer and the second semiconductor layer comprise different semiconductor materials;
- filling the opposing trenches with a dielectric material;
- planarizing the dielectric material to form dielectric regions, wherein after the planarizing, a portion of the second semiconductor layer remains;
- laterally thinning the semiconductor strip, wherein when the laterally thinning is performed, the second semiconductor layer is over the first semiconductor layer;
- and
- after the semiconductor strip is laterally thinned, depositing a silicon layer on a top surface and a sidewall of the semiconductor strip, wherein the silicon layer covers the second semiconductor layer.
A method comprising:
- depositing a silicon layer over a first semiconductor region and a second semiconductor region that are formed of different semiconductor materials;
- performing a patterning process to form:
- a first semiconductor strip comprising first remaining portions of the first semiconductor region and the silicon layer;
- and
- a second semiconductor strip comprising second remaining portions of the second semiconductor region and the silicon layer;
- forming a dielectric material comprising parts on opposing sides of the first semiconductor strip and the second semiconductor strip, wherein the dielectric material comprises an upper portion over the first semiconductor strip and the second semiconductor strip;
- performing a planarization process to remove the upper portion of the dielectric material and to form isolation regions;
- recessing the isolation regions, so that top portions of the first semiconductor strip and the second semiconductor strip protrude higher than top surfaces of the isolation regions to form a first semiconductor fin and a second semiconductor fin, respectively;
- and
- thinning at least one of the first semiconductor fin and the second semiconductor fin.
Dependencies are inferred from the claim text.