Programmable equalizer
AssigneeNXP USA, Inc.
InventorsSiamak Delshadpour, David Edward Bien
Life of this patent
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Abstract
One example discloses an equalizer, including: a first bias current source coupled to the first transistor, the second impedance and a second supply node; a second bias current source coupled to the second transistor, the first impedance and the second supply node; a third bias current source coupled to the third transistor, the first impedance and the second supply node; a fourth bias current source coupled to the fourth transistor, the second impedance and the second supply node; and a controller; wherein the controller is configured to adjust the first, second, third and fourth current sources to route a first percentage of an amplification current through the first impedance (ZE1) and a second percentage of the amplification current through the second impedance (ZE2).
Claims16
An equalizer, comprising:
- a first transistor and a second transistor both configured to receive a first input signal;
- a third transistor and a fourth transistor both configured to receive a second input signal;
- a first impedance coupled between the second transistor and the third transistor;
- a second impedance coupled between the first transistor and the fourth transistor;
- a first load resistance coupled between the first transistor and the second transistor and a first supply node;
- a second load resistance coupled between the third transistor and the fourth transistor and the first supply node;
- a first bias current source coupled to the first transistor, the second impedance and a second supply node;
- a second bias current source coupled to the second transistor, the first impedance and the second supply node;
- a third bias current source coupled to the third transistor, the first impedance and the second supply node;
- a fourth bias current source coupled to the fourth transistor, the second impedance and the second supply node;
- and
- a controller;
- wherein the controller is configured to adjust the first, second, third and fourth current sources to route a first percentage of an amplification current through the first impedance and a second percentage of the amplification current through the second impedance;
- and
- wherein the first transistor and the second transistor are directly connected to the first load resistance;
- wherein the third transistor and the fourth transistor are directly connected to the second load resistance;
- wherein the controller is configured to adjust a bias current for both the second and third bias current sources coupled to either end of the first impedance (ZE1) by varying a first control signal sent to each of the second and third bias current sources;
- wherein the controller is configured to adjust a bias current for both the first and fourth bias current sources coupled to either end of the second impedance (ZE2) by varying a second control signal sent to each of the first and fourth bias current sources;
- wherein the controller is configured to steer the amplification current between the first impedance and the second impedance by adjusting weights assigned to the first, second, third and fourth bias current sources, wherein the weights assigned to the first, second, third and fourth bias current sources are directly set by the first and second control signals, and wherein the controller comprises a digital to analog convertor that provides the first and second control signals from digital codes that can be programmed using a control interface.
Dependencies are inferred from the claim text.