Selectable current booster circuit
OwnerEnrico Mammei, Davide Morello +1inventors
InventorsEnrico Mammei, Davide Morello, Matteo Alessio Traldi
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OwnerEnrico Mammei, Davide Morello +1inventors
InventorsEnrico Mammei, Davide Morello, Matteo Alessio Traldi
Estimating the term…
According to an embodiment, a circuit for reducing current transition times includes a pre-biased first transistor, a second transistor, and a binary-weighted capacitor network with selectively activated capacitors controlled by logic gates receiving a command signal and boost selection signals. A resistor between the transistors provides a voltage restoration path. Another embodiment includes a binary-weighted resistor network with parallel resistor paths and switches. A write driver system incorporates the boost circuits, arranged in diagonal pairs across a bridge circuit. A control circuit activates the diagonal boost circuit pairs during switching transitions of the bridge circuit, generating current pulses that combine with the main bridge current to reduce transition times at a magnetic recording head while maintaining impedance matching. The boost circuits enable programmable current levels and sub-nanosecond pulse durations without complex timing circuitry, enhancing write performance in magnetic recording systems.
A write driver system, comprising:
A magnetic recording write driver system, comprising:
A hard disk drive write driver system, comprising:
Dependencies are inferred from the claim text.