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US 12,572,487 B2Granted
I/O unit, master unit, and communications system
AssigneeFanuc Corporation
InventorsMasahiro Saeki, Shinichi Kuwahata, Asunaro Maeda
Life of this patent
Estimating the term…
Abstract
An I/O unit comprises: a preceding stage-side mainstream terminal and a preceding stage-side branch terminal that are connected to preceding-stage master units; a next stage-side branch terminal that is connected to the preceding-stage branch terminal and connected to another I/O unit; a slave processing circuit that is connected to the preceding stage-side branch terminal and the next stage-side branch terminal; and a next stage-side mainstream terminal connected to the preceding stage-side mainstream terminal and a master unit in the next stage.
Claims7
An I/O unit that connects a master unit and a device and transmits a signal between the master unit and the device, the I/O unit comprising:
- a preceding-stage main-line terminal and a preceding-stage branch-line terminal configured to be connected to a first master unit that is a master unit provided in a preceding stage of the I/O unit or to another I/O unit provided in the preceding stage;
- a subsequent-stage branch-line terminal connected to the preceding-stage branch-line terminal and configured to be connected to another I/O unit provided in a subsequent stage of the I/O unit;
- a slave processing circuit connected to the preceding-stage branch-line terminal and the subsequent-stage branch-line terminal and configured to perform signal processing;
- and
- a subsequent-stage main-line terminal connected to the preceding-stage main-line terminal and configured to be connected to the other I/O unit provided in the subsequent stage or a second master unit that is a master unit provided in the subsequent stage,
- wherein
- the preceding-stage main-line terminal and a main-line terminal provided in the first master unit touches each other, and in a case where the subsequent-stage main-line terminal and a main-line terminal provided in the second master unit touches each other, a first master processing circuit provided in the first master unit and a second master processing circuit provided in the second master unit are connected with each other via the preceding-stage main-line terminal and the subsequent-stage main-line terminal, and
- in a case where the subsequent-stage main-line terminal and the main-line terminal provided in the second master unit touches each other, the subsequent-stage branch-line terminal is not connected to any of the second master processing circuit, a third master unit provided in a subsequent stage of the second master unit, or the other I/O unit provided in the subsequent stage of the second master unit.
5 more elements
A master unit including a first master processing circuit that is a master processing circuit, and configured to transmit a signal, via an I/O unit, to a device connected to the I/O unit, the master unit comprising:
- a first main-line terminal configured to connect the first master processing circuit and a second master processing circuit that is a master processing circuit located on a side of a preceding stage of the master unit, via a first I/O unit that is an I/O unit provided in the preceding stage;
- a second main-line terminal configured to connect the first master processing circuit and a third master processing circuit that is a master processing circuit located on a side of a subsequent stage of the master unit, via a second I/O unit that is an I/O unit provided in the subsequent stage;
- and
- a branch-line terminal configured to be connected to the second I/O unit,
- wherein
- the first main-line terminal and a subsequent-stage main-line terminal provided in the first I/O unit touches each other, whereby the first master processing circuit and the second master processing circuit located on a side of a preceding stage of the first I/O unit are connected with each other,
- the second main-line terminal and a preceding-stage main-line terminal provided in the second I/O unit touches each other, whereby the first master processing unit and a third master processing unit located on a side of a subsequent stage of the second I/O unit are connected with each other, and
- in a case where the first main-line terminal and the subsequent-stage main-line terminal provided in the first I/O unit touches each other, any of the first master processing circuit or the branch-line terminal is not connected to the first I/O unit.
5 more elements
A communication system comprising a master unit and an I/O unit configured to transmit a signal between the master unit and a device,
- wherein the I/O unit includes:
- a preceding-stage main-line terminal and a preceding-stage branch-line terminal configured to be connected to a first master unit that is a master unit provided in a preceding stage of the I/O unit or another I/O unit provided in the preceding stage;
- a subsequent-stage branch-line terminal connected to the preceding-stage branch-line terminal and configured to be connected to another I/O unit provided in a subsequent stage of the I/O unit;
- a slave processing circuit connected to the preceding-stage branch-line terminal and the subsequent-stage branch-line terminal and configured to perform signal processing;
- and
- a subsequent-stage main-line terminal connected to the preceding-stage main-line terminal and configured to be connected to the other I/O unit provided in the subsequent stage or a second master unit that is a master unit provided in the subsequent stage, and
- wherein the master unit includes:
- a first main-line terminal configured to be connected to the subsequent-stage main-line terminal of the I/O unit provided in the preceding stage;
- a second main-line terminal configured to be connected to the preceding-stage main-line terminal of the I/O unit provided in the subsequent stage;
- a branch-line terminal configured to be connected to the preceding-stage branch-line terminal of the I/O unit provided in the subsequent stage;
- and
- a master processing circuit connected to the first main-line terminal, the second main-line terminal, and the branch-line terminal, and configured to perform signal processing,
- wherein
- in a case where the preceding-stage main-line terminal and the second main-line terminal provided in the first master unit touches each other, and the subsequent-stage main-line terminal and the first main-line terminal provided in the second master unit touches each other, a first master processing circuit provided in the first master unit and a second master processing circuit provided in the second master unit are connected with each other via the preceding-stage main-line terminal and the subsequent-stage main-line terminal, and
- in a case where the subsequent-stage main-line terminal and the main-line terminal provided in the second master unit touches each other, the subsequent-stage branch-line terminal is not connected to any of the second master processing circuit, a third master unit provided in a subsequent stage of the second master unit, or the other I/O unit provided in the subsequent stage of the second master unit.
12 more elements
Dependencies are inferred from the claim text.