Dual-port memory module design for composable computing
AssigneeHuawei Technologies Co., Ltd.
InventorJinshui Liu
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Abstract
An efficient structure and methodology are provided for implementing a dual-port memory module to provide improved memory capacity composability, expansion and sharing. This dual-port memory module uses high-speed SerDes or Optical based redundant access ports for connection to one or more CPUs or compute nodes, where each access port may access part or all of the module's memory capacity under configuration. This provides improvement for memory capacity composability, expansion through memory sharing and improved memory access performance and reliability for composable computing applications.
Claims19
A dual-port memory module device operable to access computer memory, the device comprising:
- a plurality of memory media chips providing random access memory (RAM) capacity;
- and
- a dual-port memory controller application specific integrated circuit (ASIC) operable to allocate a first dedicated portion of the RAM capacity to a first computing host such that the first computing host is restricted to accessing only the first dedicated portion of the RAM capacity, and allocate a second dedicated portion of the RAM capacity to a second computing host such that the second computing host is restricted to accessing only the second dedicated portion of the RAM capacity, the dual-port memory controller ASIC including:
- a first interface port independently coupled to the first computing host and configured to enable direct access to the first dedicated portion of the RAM capacity;
- a second interface port independently coupled to the second computing host and configured to enable direct access to the second dedicated portion of the RAM capacity;
- and
- a plurality of memory interface channels operable to configure, read data from, and write data to the plurality of memory media chips based on the allocation of the first dedicated portion of the RAM capacity to the first computing host and the allocation of the second dedicated portion of the RAM capacity to the second computing host:
- wherein the dual-port memory controller ASIC is further operable to, upon power-on, initialize the memory media chips by reading configuration data from an on-module serial presence detect device, and to restore the allocation of the first and second dedicated portions of the RAM capacity to the first and second computing hosts based on allocation data stored in non-volatile memory.
A method of accessing computer memory comprising:
- receiving a module configuration request at a management port of a dual-port memory controller application specific integrated circuit (ASIC) of a dual-port memory module coupled by a first interface port independently to a first computing host and coupled by a second interface port independently to a second computing host;
- allocating, in response to receiving the module configuration request, a first dedicated portion of RAM capacity to the first computing host such that the first computing host is restricted to accessing only the first dedicated portion of the RAM capacity, and allocate a second dedicated portion of the RAM capacity to the second computing host such that the second computing host is restricted to accessing only the second dedicated portion of the RAM capacity;
- upon power-on, initializing memory media chips providing the RAM capacity by reading configuration data from an on-module serial presence detect device of the dual-port memory module;
- and
- restoring the allocation of the first dedicated portion of the RAM capacity to the first computing host and the second dedicated portion of the RAM capacity to the second computing host based on allocation data stored in non-volatile memory of the dual-port memory module.
Dependencies are inferred from the claim text.