Method and apparatus to implement an integrated circuit including both dynamic random-access memory (DRAM) and static random-access memory (SRAM)

A method comprising:

• storing a first portion of data of a processor in a static random-access memory (SRAM) device within an integrated circuit;
• storing a second portion of data of the processor in a dynamic random-access memory (DRAM) device within the integrated circuit;
• and
• reading from both the SRAM and DRAM devices, a first set of bits of a first word to be read from the SRAM device and a second set of bits of the first word to be read from the DRAM device, wherein reading the second set of bits from the DRAM device comprises reading bits from one or more addresses in a first set of addresses first before reading bits from one or more addresses in a second set of addresses, wherein the first set of addresses corresponds to a first region closer to a column input/output circuit of the DRAM device than a second region for the second set of addresses.

A non-transitory computer-readable storage medium storing instructions that when executed by a processor of a computing system, are capable of causing the computing system to perform:

• storing a first portion of data of the processor in a static random-access memory (SRAM) device within an integrated circuit;
• storing a second portion of data of the processor in a dynamic random-access memory (DRAM) device within the integrated circuit;
• and
• reading from both the SRAM and DRAM devices, a first set of bits of a first word to be read from the SRAM device and a second set of bits of the first word to be read from the DRAM device, wherein reading the second set of bits from the DRAM device comprises reading bits from one or more addresses in a first set of addresses first before reading bits from one or more addresses in a second set of addresses, wherein the first set of addresses corresponds to a first region closer to a column input/output circuit of the DRAM device than a second region for the second set of addresses.