Semiconductor device and method for manufacturing semiconductor device

A method for manufacturing a semiconductor device, comprising the steps of:

• forming an island-shaped semiconductor layer;
• forming an insulating film over the island-shaped semiconductor layer;
• forming a conductive film over the insulating film;
• forming a first resist mask whose end portion is positioned inward from an end portion of the island-shaped semiconductor layer over the conductive film;
• forming a conductive layer whose end portion is positioned inward from the end portion of the first resist mask by etching the conductive film with the first resist mask;
• forming a first insulating layer by etching the insulating film with the first resist mask;
• forming a second resist mask whose end portion is positioned outward from the end portion of the conductive layer by shrinkage of the first resist mask;
• forming a second insulating layer by etching part of an upper portion of the first insulating layer with the second resist mask;
• removing the second resist mask;
• forming a third insulating layer over the conductive layer, the second insulating layer, and the island-shaped semiconductor layer;
• and
• supplying a first element to the island-shaped semiconductor layer through the second insulating layer and the third insulating layer,
• wherein the first element is at least one of hydrogen, boron, nitrogen, and phosphorus,
• wherein the second insulating layer has a first tapered side surface above boundaries between the pair of second regions and the pair of third regions, and a second tapered side surface above boundaries between the pair of third regions and the pair of fourth regions,
• wherein the second insulating layer has a third tapered side surface and a fourth tapered side surface in a channel width direction,
• wherein the second insulating layer has a first top surface between the end portion of the conductive layer and the first tapered side surface, and a second top surface between the first tapered side surface and the second tapered side surface, and
• wherein the third insulating layer is in contact with top surfaces and side surfaces of the semiconductor layer, the second insulating layer, and the conductive layer.