System and method for dynamic inter-cell interference compensation in non-volatile memory storage devices
AssigneeKioxia Corporation
InventorsAvi Steiner, Hanan Weingarten, Yasuhiko Kurosawa
Life of this patent
Estimating the term…
Abstract
A method for dynamically estimating interference compensation thresholds of a page of memory includes performing a mock read on a target row using a mock read threshold, performing a read operation on an interference source and reading an interference state of the interference source, computing a histogram and a corresponding threshold based on the mock read threshold and the interference state of the interference source, and estimating a read threshold to dynamically compensate the interference state of the target row based on the histogram.
Claims24
A method comprising:
- performing a hard decoding for a read operation in response to a read command, wherein the hard decoding comprises:
- identifying a mock read threshold for a target row;
- performing a read operation on an interference source not included in the target row to thereby determine an interference state of the interference source;
- computing a histogram for the target row and the determined interference state based on one or more mock reads of the target row using the mock read threshold;
- estimating a read threshold for the target row to dynamically compensate an interference noise of the target row corresponding to the determined interference state;
- performing the read operation on the target row using the estimated read threshold corresponding to the determined interference state to obtain input for the hard decoding;
- and
- performing a soft decoding for the read operation using log likelihood ratio (LLR) information only if the hard decoding fails using the obtained input and without the LLR information.
A method comprising:
- performing a hard decoding for a read operation in response to a read command, wherein the hard decoding comprises:
- defining a target group of bits based on an interference state of the target group of bits based on interference sampling comprising soft sampling of the target group of bits and sampling of an interference source not included in the target group of bits;
- determining a histogram for the target group of bits;
- estimating, a read threshold for the target group of bits to dynamically compensate an interference noise of the target group of bits caused by the interference source;
- performing the read operation on the target group of bits using the estimated read threshold corresponding to the determined interference state to obtain input for the hard decoding;
- forming a single hard bit codeword using the obtained input from the read operation that was performed using the estimated read threshold;
- and
- performing the hard decoding on the formed single hard bit codeword.
A memory system comprising:
- a memory having a page and a plurality of rows;
- and
- a circuit for performing operations of the page of memory, the circuit being configured to:
- perform a hard decoding for a read operation in response to a read command, wherein in performing the hard decoding the circuit is further configured to:
- identify a mock read threshold for a target row of the plurality of rows;
- perform a read operation on an interference source not included in the target row to thereby determine an interference state of the interference source;
- compute a plurality of histograms for the target row respectively corresponding to a plurality of interference states based on mock reads of the target row using the mock read threshold;
- estimate a plurality of read thresholds for the target row to dynamically compensate an interference noise of the target row corresponding to the plurality of interference states using the plurality of histograms;
- and
- perform the read operation on the target row using one of the estimated read thresholds corresponding to the determined interference state to obtain input for the hard decoding.
A non-transitory processor-readable medium containing processor-readable instructions, such that, when executed by one or more processors, performs a method for dynamically estimating interference compensation thresholds of a page of memory by:
- performing a hard decoding for a read operation in response to a read command, wherein the hard decoding comprises:
- identifying a mock read threshold for a target row;
- performing a read operation on an interference source not included in the target row to thereby determine an interference state of the interference source;
- computing a histogram for the target row and the determined interference state based on one or more mock reads of the target row using the mock read threshold;
- estimating a read threshold for the target row to dynamically compensate an interference noise of the target row corresponding to the determined interference;
- performing the read operation on the target row using the estimated read threshold corresponding to the determined interference state to obtain input for the hard decoding;
- and
- performing a soft decoding for the read operation using log likelihood ratio (LLR) information only if the hard decoding fails using the obtained input and without the LLR information.
A memory system comprising:
- a memory having a page and a plurality of rows;
- and
- a circuit for performing operations of the page of memory, the circuit being configured to:
- perform a hard decoding for a read operation in response to a read command, wherein in performing the hard decoding the circuit is further configured to:
- define a target group of bits based on an interference state of the target group of bits based on interference sampling comprising soft sampling of the target group of bits and sampling of an interference source not included in the target group of bits;
- determine a histogram for the target group of bits;
- estimate a read threshold for the target group of bits to dynamically compensate an interference noise of the target group of bits caused by the interference source;
- perform the read operation on the target group of bits using the estimated read threshold corresponding to the determined interference state to obtain input for the hard decoding;
- form a single hard bit codeword using the obtained input from the read operation that was performed using the estimated read threshold;
- and
- perform the hard decoding on the formed single hard bit codeword.
A non-transitory processor-readable medium containing processor-readable instructions, such that, when executed by one or more processors, performs a method for dynamically estimating interference compensation thresholds of a page of memory using soft information by:
- performing a hard decoding for a read operation in response to a read command, wherein the hard decoding comprises:
- defining a target group of bits based on an interference state of the target group of bits based on interference sampling comprising soft sampling of the target group of bits and sampling of an interference source not included in the target group of bits;
- determining a histogram for the target group of bits;
- estimating, a read threshold for the target group of bits to dynamically compensate an interference noise of the target group of bits caused by the interference source;
- performing the read operation on the target group of bits using the estimated read threshold corresponding to the determined interference state to obtain input for the hard decoding;
- and
- performing a soft decoding for the read operation using log likelihood ratio (LLR) information only if the hard decoding fails using the obtained input and without the LLR information.
Dependencies are inferred from the claim text.