Capacitor device for unit synapse, unit synapse and synapse array based on capacitor

A unit synapse, which comprises a pair of capacitor devices, the capacitor devices forming the pair share a gate electrode and are configured to have different states, wherein the capacitor device comprises

• a substrate having an insulating layer formed on a surface of the substrate;
• a semiconductor layer provided on the insulating layer, which includes first and second doping regions formed to be spaced apart from each other in the semiconductor layer and each doped with different types of impurities and a body region formed between the first doping region and the second doping region;
• a gate electrode provided at least above the body region and electrically isolated from the body region;
• and
• a gate insulator stack configured to have a memory function capable of storing information in a non-volatile form and disposed between the gate electrode and the semiconductor layer,
• wherein the capacitance between the gate electrode and the first doping region is determined according to information stored in the gate insulator stack, and the state of the capacitor device is determined according to the capacitance to be one of two preset states.

A synapse array based on capacitor, which comprises a plurality of unit synapses arranged in an array form, the unit synapse comprises a pair of capacitor devices, the capacitor devices forming the pair share a gate electrode and are configured to have different states, wherein the capacitor device comprises

• a substrate having an insulating layer formed on its surface;
• a semiconductor layer provided on the insulating layer, which first and second doping regions formed to be spaced apart from each other in the semiconductor layer and each doped with different types of impurities and a body region formed between the first doping region and the second doping region;
• a gate electrode provided at least above the body region and electrically isolated from the body region;
• and
• a gate insulator stack configured to have a memory function capable of storing information in a non-volatile form and disposed between the gate electrode and the semiconductor layer,
• wherein the capacitance between the gate electrode and the first doping region is determined according to information stored in the gate insulator stack, and the state of the capacitor device is determined according to the capacitance to be one of two preset states.