Packaging structure having semiconductor chips and encapsulation layers and formation method thereof
AssigneesNantong Tongfu Microelectronics Co., Ltd, Tongfu Microelectronics Co., Ltd.
InventorsLei Shi, Yujuan Tao, Ying Dai
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Abstract
A packaging structure and a formation method thereof are provided. The packaging structure includes a carrier board, and a plurality of semiconductor chips adhered to the carrier board. Each semiconductor chip has a functional surface and a non-functional surface opposite to the functional surface, and a plurality of pads are formed on the functional surface of a semiconductor chip of the plurality of chips. A metal bump is formed on a surface of a pad of the plurality of pads, and a first encapsulation layer is formed on the functional surface. The packaging structure also includes a second encapsulation layer formed over the carrier board.
Claims20
A packaging structure, comprising:
- a carrier board;
- a plurality of semiconductor chips, adhered to the carrier board, wherein each semiconductor chip has a functional surface and a non-functional surface opposite to the functional surface, a plurality of pads are formed on the functional surface of a semiconductor chip of the plurality of semiconductor chips, a metal bump is formed on a surface of a pad of the plurality of pads, and a first encapsulation layer is formed on the functional surface;
- and
- a second encapsulation layer, formed over the carrier board,
- wherein an interface between a first surface of the first encapsulation layer and the functional surface of the semiconductor chip is coplanar with an interface between a first surface of the metal bump and the pad on which the metal bump is formed, and
- wherein a second surface of the first encapsulation layer protrudes over a second surface of the metal bump, providing a first opening between sidewalls of the first encapsulation layer and exposing the second surface of the metal bump at a bottom of the first opening.
A method for forming a packaging structure, comprising:
- providing a plurality of semiconductor chips, wherein each semiconductor chip of the plurality of semiconductor chips includes a functional surface and a non-functional surface opposite to the functional surface, a plurality of pads are formed on the functional surface, a metal bump is formed on a surface of a pad of the plurality of pads, an isolation sacrificial layer is formed on the metal bump, and a first encapsulation layer is formed on the functional surface and envelops both the isolation sacrificial layer and the metal bump;
- providing a carrier board;
- adhering the first encapsulation layer on the functional surface of the each semiconductor chip to the carrier board;
- forming a second encapsulation layer on the carrier board to cover the non-functional surface and a sidewall surface of a semiconductor chip of the plurality of semiconductor chips;
- forming a pre-encapsulation panel by peeling off the carrier board, wherein a back side of the pre-encapsulation panel exposes the first encapsulation layer;
- removing a portion of the first encapsulation layer and the second encapsulation layer on the back side of the pre-encapsulation panel, followed by removing the isolation sacrificial layer to expose a surface of the metal bump at the back side of the pre-encapsulation panel, wherein
- an interface between a first surface of the first encapsulation layer and the functional surface of the semiconductor chip is coplanar with an interface between a first surface of the metal bump and the pad on which the metal bump is formed, and
- a second surface of the first encapsulation layer protrudes over the exposed surface of the metal bump, providing a first opening between sidewalls of the first encapsulation layer with the exposed surface of the metal bump at a bottom of the first opening, wherein
- the metal bump on the back side of the pre-encapsulation panel is configured to electrically connect to an external contact structure.
A method for forming a packaging structure, comprising:
- providing a plurality of semiconductor chips, wherein each semiconductor chip of the plurality of semiconductor chips includes a functional surface and a non-functional surface opposite to the functional surface, a plurality of pads are formed on the functional surface, a metal bump is formed on a surface of a pad of the plurality of pads, an isolation sacrificial layer is formed on the metal bump, and a first encapsulation layer is formed on the functional surface and envelops both the isolation sacrificial layer and the metal bump;
- providing a carrier board;
- adhering the non-functional surface of the each semiconductor chip to the carrier board;
- forming a second encapsulation layer on the carrier board to cover the first encapsulation layer on the functional surface, and a sidewall surface of a semiconductor chip of the plurality of semiconductor chips;
- removing a portion of the first encapsulation layer and the second encapsulation layer over the carrier board by a planarization process, followed by removing the isolation sacrificial layer to expose a surface of the metal bump, wherein
- an interface between a first surface of the first encapsulation layer and the functional surface of the semiconductor chip is coplanar with an interface between a first surface of the metal bump and the pad on which the metal bump is formed, and
- a second surface of the first encapsulation layer protrudes over the exposed surface of the metal bump, providing a first opening between sidewalls of the first encapsulation layer with the exposed surface of the metal bump at a bottom of the first opening;
- forming an external contact structure connected to the metal bump on a surface of the planarized first encapsulation layer and the second encapsulation layer;
- and
- peeling off the carrier board.
Dependencies are inferred from the claim text.