Semiconductor device and method for forming the same

A method, comprising:

• forming first sacrificial layers and first channel layers alternately stacked over a substrate;
• forming an isolation layer in contact with a topmost one of the first channel layers;
• after forming the isolation layer, forming second channel layers and second sacrificial layers alternately stacked over the isolation layer, wherein a bottommost one of the second channel layers is in contact with the isolation layer;
• performing an etching process to remove portions of the first sacrificial layers and the second sacrificial layers;
• forming a gate structure in contact with the first channel layers and the second channel layers;
• forming first source/drain contacts on opposite sides of the gate structure and electrically connected to the first channel layers;
• forming a dielectric layer over the first source/drain contacts;
• and
• after forming the dielectric layer, forming second source/drain contacts on the opposite sides of the gate structure and electrically connected to the second channel layers.

A semiconductor device, comprising:

• a substrate;
• a first transistor over the substrate, wherein the first transistor comprises:
• first channel layers stacked over the substrate;
• a first gate structure over the first channel layers;
• and
• first source/drain contacts on opposite sides of the first gate structure;
• and
• a second transistor over the first transistor, wherein the second transistor comprises:
• second channel layers stacked over the first channel layers, wherein the second channel layers are made of a semiconductive oxide;
• a second gate structure over the first channel layers and the second channel layers;
• second source/drain contacts on opposite sides of the second gate structure, wherein the first and second source/drain contacts are made of metal, and wherein the second source/drain contacts wrap around and interface with the second channel layers;
• and
• a dielectric layer between one of the first source/drain contacts and one of the second source/drain contacts, wherein a bottom surface of the dielectric layer is in contact with the one of the first source/drain contacts;
• and
• an isolation layer vertically between the first channel layers and the second channel layers, wherein the isolation layer extends from a first position vertically between the first gate structure and the second gate structure to a second position vertically between the one of the first source/drain contacts and the one of the second source/drain contacts.