Semiconductor device manufacturing method with slip suppressing impurity region

A semiconductor device manufacturing method including a process of annealing a semiconductor wafer in a state in which a supported portion on a lower surface of the semiconductor wafer is supported by using a supporting portion, wherein the supported portion includes one or a plurality of supported portions and the supporting portion includes one or a plurality of supporting portions, the method comprising:

• forming a plurality of separately isolated slip-suppressing impurity regions isolated to separate regions each corresponding to the one or the plurality of supporting portions, each of the plurality of separately isolated slip-suppressing impurity regions including a first impurity at a common depth embedded within the lower surface of the semiconductor wafer, the plurality of separately isolated slip-suppressing impurity regions being apart from one another, being overlapped with the one or the plurality of supported portions in a top view, with no slip-suppressing impurity being within at least 10 mm from an edge of the semiconductor wafer;
• annealing the semiconductor wafer in a state in which the lower surface of the semiconductor wafer is supported by the one or the plurality of supporting portions;
• removing the semiconductor wafer from the one or the plurality of supporting portions;
• and
• removing the one or the plurality of separately isolated slip-suppressing impurity regions by removing the lower surface of the semiconductor wafer which includes the one or the plurality of separately isolated slip-suppressing impurity regions.