Sampling circuit and operating method of the same

An analog-to-digital converter comprising:

• a sampling circuit configured to receive an input signal, which is an analog signal, and output a sampled signal at regular time intervals;
• a front-end circuit configured to receive the sampled signal, process the sampled signal, and output a processed signal;
• and
• a back-end circuit configured to receive the processed signal and convert the processed signal to an output signal, which is a digital signal, and output the digital signal,
• wherein the input signal comprises a first input signal and a second input signal, and
• wherein the sampling circuit comprises:
• a linearization circuit connected to a first input terminal for receiving the first input signal and a second input terminal for receiving the second input signal;
• a first switch connected between the first input terminal and the linearization circuit;
• a second switch connected between the first input terminal and the linearization circuit;
• a third switch connected between the second input terminal and the linearization circuit;
• a fourth switch connected between the second input terminal and the linearization circuit;
• a first capacitor connected between the linearization circuit and a first output terminal for outputting a first sampled signal;
• and
• a second capacitor connected between the linearization circuit and a second output terminal for outputting a second sampled signal.

A receiver comprising a sampling circuit configured to receive an input signal, which is an analog signal, and output a sampled signal at regular time intervals, wherein the sampling circuit comprises:

• a linearization circuit connected to a first input terminal for receiving a first input signal and a second input terminal for receiving a second input signal;
• a first switch connected between the first input terminal and the linearization circuit;
• a second switch connected between the first input terminal and the linearization circuit;
• a third switch connected between the second input terminal and the linearization circuit;
• a fourth switch connected between the second input terminal and the linearization circuit;
• a first capacitor connected between the linearization circuit and a first output terminal for outputting a first sampled signal;
• and
• a second capacitor connected between the linearization circuit and a second output terminal for outputting a second sampled signal.