ReDriver circuit

A driver circuit, comprising:

• a first transistor (QTN) coupled to a first differential input (IN) and a power supply input (VCC);
• a second transistor (QTP) coupled to a second differential input (IP) and the power supply input;
• a third transistor (QBN) coupled to a first differential output (ON);
• a fourth transistor (QBP) coupled to a second differential output (OP);
• a first resistance (RP1) coupling the first transistor (QTN) to the third transistor (QBN);
• a second resistance (RP2) coupling the second transistor (QTP) to the fourth transistor (QBP);
• a first capacitance (CF1) coupling the first transistor (QTN) to a control line of the fourth transistor (QBP);
• a second capacitance (CF2) coupling the second transistor (QTP) to a control line of the third transistor (QBN);
• a first switched resistance coupled in parallel with the first capacitance (CF1);
• a second switched resistance coupled in parallel with the second capacitance (CF2);
• a third switched resistance coupling the control line of the third transistor (QBN) to a ground;
• and
• a fourth switched resistance coupling the control line of the fourth transistor (QBP) to the ground.

A driver circuit, comprising:

• a first transistor (QTN) coupled to a first differential input (IN) and a power supply input (VCC);
• a second transistor (QTP) coupled to a second differential input (IP) and the power supply input;
• a third transistor (QBN) coupled to a first differential output (ON);
• a fourth transistor (QBP) coupled to a second differential output (OP);
• a first resistance (RP1) coupling the first transistor (QTN) to the third transistor (QBN);
• a second resistance (RP2) coupling the second transistor (QTP) to the fourth transistor (QBP);
• a first capacitance (CF1) coupling the first transistor (QTN) to a control line of the fourth transistor (QBP);
• a second capacitance (CF2) coupling the second transistor (QTP) to a control line of the third transistor (QBN);
• and
• a controller coupled to the power supply input and configured to generate an enable signal (TX_En);
• wherein the driver circuit includes a first set of differential input (IP) switches coupled to the first differential input (IN) and a second set of differential input (IN) switches coupled to the second differential input (IP);
• and
• wherein the first and second differential input switches are configured to couple the first and second differential inputs to a first voltage if the enable signal (TX_En) is in a first state and to a second voltage if the enable signal (TX_En) is in a second state.