Switch linearization with asymmetrical anti-series varactor pair

A radio-frequency switch module comprising:

• a packaging substrate configured to receive a plurality of components;
• a semiconductor die mounted on the packaging substrate, the semiconductor die including a switch, the switch including a series arm coupled between an input node and an output node;
• the switch including a shunt arm having a set of field-effect transistors, the shunt arm coupled between the series arm and a reference node;
• the switch including a varactor stack comprising a plurality of anti-series varactor pair pairs with at least one anti-series varactor pair being an anti-series asymmetric varactor pair with a first varactor having a width that is equal to a base width plus a width difference and a second varactor having a width that is equal to the base width minus the width difference and at least one anti-series varactor pair being an anti-series symmetric varactor pair with each varactor having a width equal to the base width, the varactor stack coupled in parallel to the shunt arm between the series arm and the reference potential node, a ratio of a number of asymmetric varactor pairs to a number of symmetric varactor pairs of the plurality of anti-series varactor pairs configured to reduce second-order harmonics generated by the set of field effect transistors in the shunt arm.

A wireless device comprising:

• a transceiver configured to process radio-frequency (RF) signals;
• an antenna in communication with the transceiver configured to facilitate transmission of an amplified RF signal;
• a power amplifier connected to the transceiver and configured to generate the amplified RF signal;
• and
• a switch connected to the antenna and the power amplifier and configured to selectively route the amplified RF signal to the antenna, the switch including a series arm coupled between an input node and an output node;
• the switch including a shunt arm having a set of field-effect transistors, the shunt arm coupled between the series arm and a reference node;
• the switch including a varactor stack comprising a plurality of anti-series varactor pair pairs with at least one anti-series varactor pair being an anti-series asymmetric varactor pair with a first varactor having a width that is equal to a base width plus a width difference and a second varactor having a width that is equal to the base width minus the width difference and at least one anti-series varactor pair being an anti-series symmetric varactor pair with each varactor having a width equal to the base width, the varactor stack coupled in parallel to the shunt arm between the series arm and the reference potential node, a ratio of a number of asymmetric varactor pairs to a number of symmetric varactor pairs of the plurality of anti-series varactor pairs configured to reduce second-order harmonics generated by the set of field effect transistors in the shunt arm.