Local interconnected network bus repeater delay compensation
AssigneeAyDee Kay LLC
InventorsArtur Langner, Colin Ramsay
Life of this patent
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AssigneeAyDee Kay LLC
InventorsArtur Langner, Colin Ramsay
Estimating the term…
An integrated circuit is described. This integrated circuit may include: a receive circuit, coupled to a segment of a LIN bus, that receives bits; a measurement circuit, coupled to the receive circuit, that measures: a rising-edge time and a falling-edge time in the bits, or a bit time and a second bit time in the bits; control logic, coupled to the measurement circuit, that compares the rising-edge time and the falling-edge time, or the bit time and the second bit time; a transmit circuit, coupled to the receive circuit, that transmits the bits on a second segment of the LIN bus; and a delay circuit, coupled to the control logic, that applies, based at least in part on the comparison, a delay to: one or more rising edges or falling edges in the bits; or one or more bit times or second bit times in the bits.
An integrated circuit, comprising:
An electronic device, comprising:
A method for performing compensation, comprising by an integrated circuit:
Dependencies are inferred from the claim text.