Linearization of low gain low-noise amplifiers through third-order distortion cancellation

An amplifier, comprising:

• a first transistor;
• an impedance matching circuit configured to receive an input radio frequency (RF) signal within an operating frequency band of the amplifier, wherein the impedance matching circuit is coupled to a control input of the first transistor;
• an output impedance circuit configured to generate an output RF signal within the operating frequency band;
• and
• a first tank circuit configured to produce a resonance impedance at a first frequency substantially twice a second frequency of the input RF signal, wherein the output impedance circuit, the first transistor, and the first tank circuit are coupled in series between a first voltage rail and a second voltage rail,
• wherein the first tank circuit comprises:
• a set of capacitors;
• and
• a set of parallel transistor banks coupled in series with the set of capacitors between the first transistor and the second voltage rail, wherein the set of parallel transistor banks include sets of control inputs configured to receive sets of select signals to control a set of resistances of the set of parallel transistor banks, respectively.

An amplifier, comprising:

• a first transistor;
• an impedance matching circuit configured to receive an input radio frequency (RF) signal within an operating frequency band of the amplifier, wherein the impedance matching circuit is coupled to a control input of the first transistor;
• an output impedance circuit configured to generate an output RF signal within the operating frequency band;
• and
• a first tank circuit configured to produce a resonance impedance at a first frequency substantially twice a second frequency of the input RF signal, wherein the output impedance circuit, the first transistor, and the first tank circuit are coupled in series between a first voltage rail and a second voltage rail,
• wherein the first tank circuit comprises:
• a capacitor;
• a resistive device coupled in series with the capacitor between the first transistor and the second voltage rail;
• and
• an inductor coupled in parallel with the capacitor and the resistive device between the first transistor and the second voltage rail.

An amplifier, comprising:

• a first transistor;
• an impedance matching circuit configured to receive an input radio frequency (RF) signal within an operating frequency band of the amplifier, wherein the impedance matching circuit is coupled to a control input of the first transistor;
• an output impedance circuit configured to generate an output RF signal within the operating frequency band;
• and
• a first tank circuit configured to produce a resonance impedance at a first frequency substantially twice a second frequency of the input RF signal, wherein the output impedance circuit, the first transistor, and the first tank circuit are coupled in series between a first voltage rail and a second voltage rail,
• wherein:
• the first tank circuit is configured to produce the resonance impedance at the first frequency substantially twice the second frequency of the input RF signal while the amplifier is operating in a first gain mode;
• and
• the first tank circuit is configured to be disabled while the amplifier is operating in a second gain mode.

A method of reducing a third-order intermodulation component at a first terminal of a transistor, comprising:

• receiving an input radio frequency (RF) signal cycling with a first frequency at a control terminal of the transistor;
• generating a feedback RF signal cycling at a second frequency at a second terminal of the transistor, wherein the second frequency is substantially twice the first frequency;
• and
• generating a third-order intermodulation cancellation component at the first terminal including combining the input RF signal with the feedback RF signal, wherein the third-order intermodulation cancellation component has a magnitude and phase substantially equal and opposite to a magnitude and phase of the third-order intermodulation component at the first terminal of the transistor, respectively,
• wherein generating the feedback RF signal at the second terminal of the transistor comprises generating the feedback RF signal via a tank circuit between the second terminal of the transistor and a voltage rail, wherein the tank circuit has a resonance frequency at substantially the second frequency of the feedback RF signal, and
• wherein the tank circuit comprises:
• a resistive device;
• and
• a capacitor coupled in series with the resistive device between the transistor and the voltage rail.

A wireless communication device, comprising:

• at least one antenna;
• a transceiver coupled to the at least one antenna, wherein the transceiver comprises a low noise amplifier (LNA) comprising:
• a first transistor;
• an impedance matching circuit configured to receive an input radio frequency (RF) signal within an operating frequency band of the LNA, wherein the impedance matching circuit is coupled to a control input of the first transistor;
• an output impedance circuit configured to generate an output RF signal within the operating frequency band;
• and
• a first tank circuit configured to produce a resonance impedance at a frequency substantially twice a frequency of the input RF signal, wherein the output impedance circuit, the first transistor, and the first tank circuit are coupled in series between a first voltage rail and a second voltage rail, wherein the first tank circuit comprises:
• a resistive device;
• and
• a capacitor coupled in series with the resistive device between the first transistor and the second voltage rail;
• and
• a communication processor coupled to the transceiver.

An amplifier, comprising:

• a first transistor having a gate configured to receive an input radio frequency (RF) signal within an operating frequency band of the amplifier;
• a load circuit coupled between a first voltage rail and a drain of the first transistor and configured to generate an output RF signal within the operating frequency band;
• and
• a first tank circuit coupled between a source of the first transistor and a second voltage rail, the first tank circuit comprising an inductor coupled between the source of the first transistor and the second voltage rail, the first tank circuit further comprising a variable capacitor device coupled in series with a variable resistive device, the variable capacitor device and the variable resistive device coupled between the source of the first transistor and the second voltage rail.